ASIC Design Engineer I, Satellite Communications

Amazon • San Diego, CA

2d • $122,600 - $170,000 • Onsite

About The Position

Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. We're hiring an ASIC Engineer within a high performance ASIC design team. This team is using industry leading methodologies to develop proprietary IP’s. Be part of Leo’s sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways. This is a unique opportunity to define a groundbreaking wireless solution with few legacy constraints. The team works with customer requirements and wireless system teams to define modems, high-speed interfaces, embedded processors, and DSP solutions in latest CMOS generation technologies.

Requirements

• Bachelor's degree in Electrical Engineering or a related field
• 2+ years of experience in digital logic design, preferably in DSP or communication systems.
• Experience in designing and implementing Digital Signal Processing (DSP) algorithms and systems in RTL.
• Ability to convert DSP algorithms into RTL code and optimize for performance, power, and area.
• Must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.

Nice To Haves

• Master's or Ph.D degree in Electrical / Communications Engineering.
• 2+ years of experience preferably in communication systems.

Responsibilities

• Engage with architects and system engineers to drive hardware micro-architecture.
• Able to interpret reference models in MATLAB.
• Involve in control plane logic design and interfaces to bus fabrics.
• Explore and propose innovative ideas and work towards optimization of the modem.
• Implement wireless system architecture in silicon from system specification to chip specification to RTL to optimizing timing / power to chip level validation.
• Drive high quality designs for first-time right silicon solutions, and meeting the power objectives.
• Work with the verification team and participate in System level verification using test benches constructed using UVM, System C and DPI-C.
• Learn about requirements and solutions for systems operating in space.
• Drive trade-off analysis to benefit customer experience and optimization of resources (costs, power, spectrum).

Benefits

• health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage)
• 401(k) matching
• paid time off
• parental leave
• sign-on payments
• restricted stock units (RSUs)

What This Job Offers

• Job Type: Full-time
• Career Level: Entry Level