ASIC Chip Lead and Design Engineer (remote)
About The Position
Design and deliver complex custom ASICs from concept through silicon. This hands-on role works across the full ASIC/SoC development flow, collaborating with architecture, verification, physical design, applications, and business teams to translate technical requirements into high-performance silicon while optimizing power, performance, and area (PPA). The engineer will also evaluate customer requirements, develop technical approaches and effort estimates for new opportunities, and help improve internal design methodologies and processes. Additional experience in radiation-hardened design, analog/mixed-signal circuits, EDA methodologies, or standard-cell library development can be applied and expanded in the role. The position leads chip architecture and development, designs and optimizes RTL, develops chip-wide timing constraints, constrains and verifies RISC processors, collaborates on physical design and closure, and supports functional verification. It also involves working with modern revision-control tools in a collaborative, multi-site design community and using UNIX/Linux, scripting and programming languages, and Windows productivity applications.
Requirements
- BSEE, MSEE, or equivalent.
- 10+ years of direct industry experience with ASIC and/or SoC design.
- Proficiency in Synopsys Design Compiler and other EDA tools.
- Strong understanding of digital design principles.
- Familiarity with RISC architectures such as ARM or MIPS.
- Strong background in RTL-based digital IC design using Verilog/SystemVerilog.
- Proven track record of first-pass successes.
- Ability to take initiative and assume leadership roles.
- Ability to work well in a diverse team environment.
- Willingness to mentor junior engineers.
- Experience with industry-standard development tools and methodologies.
- Proficiency with UNIX/Linux, including shell scripting, text utilities such as sed, awk, and grep, and Modules.
- Experience with high-level programming and scripting, including C/C++, Perl, Python, and Tcl.
- Proficiency with Windows applications, including Word, Excel, PowerPoint, Visio, Project, and PDF conversion.
- Excellent problem-solving skills and attention to detail.
Nice To Haves
- Experience in radiation-hardened design.
- Experience with analog/mixed-signal circuits.
- Experience with EDA methodologies.
- Experience with standard-cell library development.
Responsibilities
- Lead ASIC architectural design based on high-level requirements and block diagrams.
- Collaborate with system architects to define chip functionality, interfaces, and performance targets.
- Develop detailed specifications for chip components.
- Create RTL designs using Synopsys Design Compiler and optimize RTL for area, power, and performance.
- Implement and verify complex digital blocks.
- Develop timing constraints for the entire chip.
- Work with physical design teams to support successful place-and-route.
- Constrain and verify RISC processors within the chip and optimize processor performance and power efficiency.
- Collaborate on floorplanning, placement, and routing, and address design-closure issues.
- Work with verification engineers to ensure functional correctness and assist with testbench creation and chip verification.
- Evaluate customer requirements and develop technical approaches and effort estimates for new opportunities.
- Help improve internal design methodologies and processes.
- Use modern revision-control tools and best practices in a collaborative, multi-site design community.
- Mentor junior engineers.
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What This Job Offers
Job Type
Full-time
Career Level
Senior
