Applied Research - Chip Design

Prime Intellect•San Francisco, CA
•$150,000 - $300,000

About The Position

Prime Intellect is hiring an applied researcher to build agents, environments, evaluations, and post-training systems for semiconductor design and verification workflows. The work is grounded in an external design workflow and includes access to relevant domain experts and toolchains. It may span RTL generation and debugging, formal verification, simulation, physical design, optimization, and orchestration across EDA tools. Applied Research turns workflows into tasks, environments, evaluations, and reward signals; runs post-training experiments against real baselines; and deploys effective approaches. Researchers investigate whether gains come from the model, data, harness, inference, or infrastructure, and develop reusable work into shared research, open-source systems, and product capabilities. Every Applied Research role is externally facing, with most researchers working directly with customers, users, or research partners while maintaining a substantive research agenda. Representative early work includes building an interactive verification environment in which an agent reads specifications, writes or repairs RTL, invokes simulation or formal tools, interprets failures, and iterates toward verified results; designing rewards and evaluations that balance correctness, tool efficiency, robustness, and performance/power/area constraints; and training long-horizon agents that recover from failures, preserve useful state, and generalize across designs and constraints.

Requirements

  • Depth in reinforcement learning, agents, or post-training systems, and the ability to become fluent in semiconductor workflows.
  • Hands-on experience building and debugging model-training, post-training, agent, evaluation, or closely adjacent experimental loops.
  • Strong experimental judgment, including meaningful baselines, careful trace inspection, clear failure attribution, and willingness to change direction when evidence changes.
  • Strong Python skills and ability to build artifacts that other researchers and engineers can run, inspect, and extend.
  • Comfort owning ambiguous problems and keeping partners and teammates current while resolving them.

Nice To Haves

  • Prior work in design automation, compilers, formal methods, or machine learning for systems is useful but not required.
  • Evidence of exceptional work such as publications, open-source systems, benchmarks, or shipped products.

Responsibilities

  • Build interactive environments in which agents use EDA tools to modify designs, debug failures, and plan multi-step work.
  • Develop verifiers and reward signals grounded in tests, simulation, formal methods, design rules, and engineering outcomes.
  • Run experiments on credit assignment when feedback is delayed and multiple tools contribute.
  • Create evaluations for correctness, recovery, and generalization, including reusable methods for other simulator-grounded engineering domains.
  • Build and evaluate agents for semiconductor design and verification workflows, potentially spanning RTL generation and debugging, formal verification, simulation, physical design, optimization, and orchestration across EDA tools.
  • Run post-training experiments against real baselines and determine whether measured gains come from the model, data, harness, inference, or infrastructure.
  • Work directly with customers, users, or research partners while maintaining a substantive research agenda.

Benefits

  • Cash compensation range of $150,000–$300,000 plus equity incentives.
  • Flexible work locations: San Francisco, New York, London, or remote.
  • Visa sponsorship and relocation support.
  • Professional development budget.
  • Team off-sites and conference attendance.
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