Applied AI Engineer, Silicon Co-Design Group, New College Grad 2026

NVIDIA•Us, CA

1d•Onsite

About The Position

Working at the Silicon Co-design Engineering Team at NVIDIA, you will be responsible for productizing NVIDIA's chips into groundbreaking consumer, professional, server, mobile, and automotive solutions. The qualified candidate should be comfortable in a lab environment and should demonstrate a passion towards creation, execution and improvement of silicon validation plans.

Requirements

M.S. or Ph.D. (or completing within 6 months) in CS/EE/CE or related field or equivalent experience.
Strong Python; plus C/C++ and/or Tcl/Perl/Bash.
Understanding of model development and evaluation; familiarity with Transformers/LLMs and at least one of CNN/RNN/GNN concepts.
Hands-on with ML framework PyTorch / TensorFlow.
Strong fundamentals in Git, code reviews, testing, CI/CD, documentation.
Strong debugging/problem-solving, ability to handle ambiguity, and effective communication/collaboration across HW/SW teams.
Interest in applying AI to semiconductor co-design/validation problems and learning the domain quickly.

Nice To Haves

Familiarity with statistical methods, tools for data analysis, and analyzing large datasets to draw actionable conclusions, possibly applying deep learning techniques.
Knowledgeable in signal integrity, timing analysis, fault analysis, sampling, computer architecture, filters.
Familiar with lab tools (oscilloscopes and logic analyzers).
Experience in Database and Web Development is a plus!

Responsibilities

Build and deploy AI/ML + GenAI solutions (LLMs, classical ML) to accelerate silicon co-design and validation workflows.
Develop AI assistants and agentic systems for SCG engineers using RAG, tool-calling, and fine-tuned models.
Create scalable data + MLOps pipelines to collect/curate chip design & validation data and support training, evaluation, and production deployment.
Partner with cross-functional silicon teams to identify high-impact automation opportunities, integrate solutions into existing flows, and drive measurable improvements in turnaround time and quality.
Prototype and apply modern ML techniques relevant to silicon co-design and share learnings via tech talks/knowledge sharing.