Analog Mixed Signal Design Engineer, Staff

Marvell TechnologyOttawa, ON

About The Position

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. This is an existing vacancy. Your Team, Your Impact Marvell is seeking an Analog & Mixed-Signal Design Engineer to contribute to the development of multi-tens of GHz Analog equalization or DSP equalization based transceivers. These advanced transceivers consist of broad-band channel equalization circuitries. Our DSP based Clock-Data-Recovery solutions consists of 10s of GHz ADC/DAC and employ Marvell’s innovative technologies to address the extreme challenges in low-jitter clock generation and distribution. The results of these innovative work enable Marvell to produce the world’s first single-chip 100Gb/s (2x50G) PAM4 DSP transceiver (2015), world’s first single-chip 200Gb/s (4x50G) DSP based PAM4 transceiver (2018) and world’s first single-chip 400Gbps (4x100G) in advanced CMOS nodes. What You Can Expect Contribute to the development of multi-tens of GHz Analog equalization or DSP equalization based transceivers.

Requirements

  • MSc/PhD EE in the areas of design of high-performance analog/mixed-signal ICs.
  • Proven experience in IC design including chip tape-out AND lab evaluation of design (either during graduate studies or working in the industry).
  • Solid experience in Using EDA CAD tools
  • Performing Analog Custom Layout
  • Experience in measuring IC performance and debug of design to correlate simulations to measurements
  • Deep understanding of fundamental, including: Detailed transistor level design Device physics Control/Feedback loop stability analysis
  • A team-player
  • Strong communication, presentation and documentation skills.

Nice To Haves

  • Direct project experience in at least one of the following areas a plus: ADC-DAC design PLL or clock/freq generation design RF/High-Speed (10GHz+) issues
  • Knowledge & experience in Verilog coding a plus
  • Experience in Package-System integration issues desired
  • Project experience in using advance CMOS nodes (FinFET experience a plus)

Responsibilities

  • Contribute to the development of multi-tens of GHz Analog equalization or DSP equalization based transceivers.
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