Intern, Analog Design, Technology Platforms - Spring 2026

Murata America • San Diego, CA

7d • $32 - $58

About The Position

The Analog Design Intern will assist engineers in designing and developing Technology Platforms’ analog circuits used in pSemi RFIC products for cellular and connectivity applications. Circuit types may include charge pumps, bandgap references, low-dropout regulators, logic translators, RF gate drivers, power-on-reset circuits, and DFT circuit blocks. The intern will also support development of Verilog-A models for analog circuit blocks and document design information. Depending on the project, the intern may work with Digital Design, Layout, Process Technology, and Modeling teams.

The role includes circuit-block simulation and layout, analysis of characterization data and preparation of test reports, development and refinement of Verilog/Verilog-A models for chip-level simulations, and documentation of IP-block usage. This is a temporary internship position for Spring 2026, with the selected candidate employed and paid by a third-party staffing agency selected by pSemi.

Requirements

• Knowledge of analog integrated circuit design.
• Experience or proficiency with Cadence and Excel software tools.
• Strength in documentation clarity and completeness.
• Ability to work effectively within the group and cross-functionally with other teams.
• Strong sense of urgency to meet task requirements on schedule.
• BSEE or similar degree.
• Currently enrolled in an MS or PhD EE program focused on RF, mixed-signal, or analog circuits.

Nice To Haves

• Familiarity with RF IC and systems topics.
• Familiarity with SOI process.

Responsibilities

• Work independently and with engineers on simulation and layout of analog/mixed-signal circuit blocks.
• Work with a characterization engineer to analyze circuit-block testing data and create test reports.
• Build Verilog/Verilog-A models for analog circuit blocks to enable efficient chip-level simulations.
• Interface with Analog and RFIC design teams as needed to fine-tune models.
• Document design work to educate others on IP-block usage.

What This Job Offers

• Job Type: Full-time
• Career Level: Intern