Analog Design Engineer

Teledyne Technologies IncorporatedGoleta, CA

About The Position

Teledyne Technologies Incorporated provides enabling technologies for industrial growth markets that require advanced technology and high reliability. These markets include aerospace and defense, factory automation, air and water quality environmental monitoring, electronics design and development, oceanographic research, deepwater oil and gas exploration and production, medical imaging and pharmaceutical research. We are looking for individuals who thrive on making an impact and want the excitement of being on a team that wins. This role is for a Senior Analog Engineer who will be the lead analog designer of infrared image sensor arrays. As part of the design phase, the engineer will determine timing and design the analog signal path, as well as chip-level electrical and mechanical interfaces. The role involves performing design trade studies and contributing to chip-level architectural decisions. The engineer will also perform performance analysis, including noise, power, and variability. The position is responsible for the entire analog design, focusing on system-level analysis, but also responsible for transistor-level simulations. The engineer will technically lead a small team of digital and layout engineers working on the same project. Responsibilities include producing high-quality documentation of design rationale and tradeoffs in compliance with ISO9001 processes and presenting material to peers and customers. The engineer will work with test and systems engineers through characterization of final products. This role demonstrates readiness to progress toward a Principal Analog Designer role with broader technical ownership and project leadership.

Requirements

  • Applicants must be either a U.S. citizen or PERM Resident.
  • B.S. in EE or Physics required
  • 8+ years of experience in IC design
  • Circuit topology
  • Analog design for CMOS technology
  • Experience with imaging systems and electro-optical components
  • Defining Read-Out Integrated Circuit (ROIC) and timing
  • Schematic capture and SPICE simulation
  • Communication, collaboration and teamwork required to be a technical leader of a small design team
  • Attention to detail required to perform detailed design process
  • Written communication to document performance and design trades
  • Verbal communication and presentation skills to present designs and trades
  • Definition of IC timing
  • Small signal analysis
  • Noise performance analysis including switched circuit noise
  • Analysis of layout parasitic effects
  • Foundry interface
  • Understanding and installing foundry PDKs
  • Tape out process
  • Testing and debugging of IC hardware
  • Communication and relationships with customer
  • Proficient in Windows and Linux operating systems
  • Proficient in MS Office (Excel, PowerPoint, Word)

Nice To Haves

  • M.S., or PhD in EE or Physics desired

Responsibilities

  • Flow down and documentation of customer requirements
  • Develop IC blocks, floor plan and performance analysis
  • Perform analog design, timing design, and detailed analog simulations
  • Perform noise analysis to predict image performance
  • Generation of IC design documentation
  • Customer interface
  • Detailed analog IC design process
  • Coordination with design team, including other IC designers and layout engineer
  • Responsible ensuring correct design implementation based on foundry PDK
  • Provide complete detailed final documentation to enable test engineering to develop test hardware and software to test IC as required
  • IC device test support; provide assistance (as required) to test engineering to perform test verification

Benefits

  • Teledyne is an Equal Opportunity Employer.
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