Analog Design Engineer

Intel Corporation•Hillsboro, OR

1d•$122,440 - $172,860•Hybrid

About The Position

The Hard IP and Test Chip Development team, within Intel's Central Engineering Group, is responsible for delivering industry defining analog and mixed signal IP for Intel's Client, Datacenter, AI and Foundry customers. The IO team owns high-speed serial IO and die-to-die interfaces across multiple advanced process nodes. As an Analog Design Engineer at Intel, you will play a pivotal role in developing cutting-edge analog circuits for advanced process nodes, contributing directly to the innovation and excellence of our analog and mixed-signal IPs. Your work will shape the performance, power efficiency, and area optimization of design solutions, enabling Intel to deliver industry-leading products. Working collaboratively with cross-functional teams, you will impact the company's success by driving advancements in circuit design and validation and empowering products that redefine technology standards.

Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field with 3 or more years of experience in circuit design, or Master's degree in Electrical Engineering, Computer Engineering, or a related field with 2 or more years of experience in circuit design.
Circuit simulation tools and analog behavior modeling.
Familiarity with signal and power integrity, and layout understanding for analog circuits.
Knowledge of TX/RX blocks, I/O fundamentals, and core analog design principles, including noise, linearity, matching, and stability.
Cadence analog IC design tools.
Strong analytical and problem-solving skills.
Ability to work independently, analyze and making design trade-offs of analog building blocks at transistor level.
Strong communication skills and ability to provide critical feedback constructively.

Nice To Haves

IP top level design experience - Floor Planning, Power Delivery, ESD, Bump Map, Top Level Sims, Signal Integrity
Advanced problem-solving skills with a disciplined approach to execution.
Experience in group problem-solving and working collaboratively across teams.
Experience integrating performance, power, and area optimization into circuit designs.
Experience in analog IC design.
Mixed-signal design.
Knowledge of layout considerations for analog circuits.
Experience with scripting languages (Python, MATLAB, etc.).
Understanding of statistical analysis and design for manufacturability.

Responsibilities

Design, develop, and build analog circuits for analog and mixed-signal IPs in advanced process nodes.
Perform circuit analysis using SPICE simulation tools (Cadence, Synopsys, LTSpice, etc.).
Develop and implement test plans to validate designs against circuit and block microarchitecture specifications.
Support layout activities and work closely with layout engineers to optimize circuit performance.
Participate in design reviews and contribute to technical documentation.
Collaborate with cross-functional teams including architecture, logic design, validation, and SOC partners.
Perform circuit simulations and debug to ensure power integrity, signal integrity, and leakage reduction.
Conduct rigorous evaluation of simulation results to optimize circuit designs for power and performance.
Provide regular reports on design progress to key stakeholders, ensuring transparency and alignment across teams.