Analog and RF layout engineer W2 Hiring

PDDN INC. • Sunnyvale, CA

1d • Onsite

About The Position

We are seeking an experienced Analog and RF layout engineer to join our team. This role involves developing and leading complex layout IC for high-speed applications in advanced CMOS FinFET technologies (7nm and below) at both the block and chip levels. The ideal candidate will have a strong understanding of industry-standard EDA tools and experience with various layout techniques.

Requirements

• Minimum 6+ years of experience in Analog and RF layout.
• Experience developing and leading complex layout IC for high-speed applications in advanced CMOS FinFET technologies such as 7nm and below at the block level and chip level.
• Thorough knowledge of industry standard EDA tools from Cadence, Mentor and Synopsys.
• Experience with layout of high-performance high-speed analog mixed-signal blocks such Transceivers, CMOS drivers, high-speed Data converters and PLLs.
• Experience with floor planning, block level routing and top-level chip assemble.

Nice To Haves

• Knowledge of layout techniques such as floor planning, layer generation, thermal aware layout with consideration for electro-migration.

Responsibilities

• Developing and leading complex layout IC for high-speed applications in advanced CMOS FinFET technologies such as 7nm and below at the block level and chip level.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Education Level: No Education Listed
• Number of Employees: 1-10 employees