Analog and RF Layout Engineer

the job you are considering • San Francisco, CA

11h

About The Position

As a Senior Analog / RF IC Layout Engineer, you will play a critical role in designing and enabling cutting-edge high-speed mixed-signal silicon for next-generation technologies. You will collaborate with world-class design, verification, and process teams to deliver robust, scalable layouts in advanced FinFET nodes that power high-performance products across industries.

Requirements

• 6+ years of experience in Analog and RF IC layout for high-speed applications
• Hands-on experience developing and leading complex layouts at both block and full-chip levels in advanced FinFET technologies (7nm and below)
• Strong expertise using industry-standard EDA tools from Cadence, Mentor, and Synopsys
• Proven experience with layout of high-performance analog mixed-signal blocks, such as High-speed transceivers, CMOS drivers, High-speed data converters, PLLs
• Solid understanding of floorplanning, routing, layer generation, thermal-aware layout practices, and electromigration considerations

Responsibilities

• Lead and contribute to the physical layout of complex, high-speed analog and RF mixed-signal blocks from concept through tape-out
• Develop and implement block-level and chip-level layouts in advanced CMOS FinFET technologies (7nm and below)
• Partner closely with analog, RF, and digital designers to ensure layout quality, performance, and manufacturability
• Own floor planning, block-level routing, and top-level chip assembly activities for complex integrated circuits
• Apply best-in-class layout techniques to address signal integrity, electromigration, thermal awareness, and high-speed performance
• Drive layout reviews, layout verification, and design rule compliance using industry-standard EDA tools
• Mentor and guide junior engineers while promoting quality, collaboration, and engineering best practices

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Education Level: No Education Listed