AI Chip Architect
About The Position
MatX designs hardware tailored for the world’s best AI models. Our hardware will make a given level of intelligence available 3-5 years sooner. We are developing vertically integrated full-stack solutions from silicon to systems including hardware and software to train and run the world’s largest models. MatX is seeking an Architect to join our team as we create best-in-class silicon for high-performance and sustainable GenAI. The successful candidate for this role will be responsible for delivering performant silicon architecture at the full-chip or subsystem level. MatX is seeking an AI Accelerator Compute Architect to help define the compute architecture for our next-generation GenAI accelerators.
Requirements
- Strong background in computer architecture, especially AI accelerators, GPUs, TPUs, vector processors, SIMD, VLIW, or other parallel compute architectures.
- Experience translating workloads into hardware architecture.
- Solid microarchitecture fundamentals.
- First-principles understanding of latency, throughput, utilization, and scalability.
- Familiarity with numeric formats, quantization, rounding, and precision/performance tradeoffs.
- Programming, code optimization, or kernel-level performance analysis experience.
- Excellent written and verbal communication skills.
- All candidates must be authorized to work in the United States and work from our offices in Mountain View Tuesdays-Thursdays.
- This position requires access to information that is subject to U.S. export controls. This offer of employment is contingent upon the applicant's capacity to perform job functions in compliance with U.S. export control laws without obtaining a license from U.S. export control authorities.
Nice To Haves
- Familiarity with performance-optimization techniques in large-scale transformer models is a plus.
Responsibilities
- Define the architecture for MatX’s AI compute subsystem, including ISA, connectivity, memories, and control.
- Derive architectural requirements from AI use cases.
- Conduct analytical and empirical performance analysis.
- Collaborate closely with Research, SW, and HW teams to ensure we architect just-right silicon for workloads, programmability, and PPA.
- Work through power, area, performance tradeoffs with stakeholders.
- Support test plan reviews, first-silicon bring-up, and post-silicon debug.
Benefits
- 4 weeks PTO (accrued)
- 12 company Holidays
- up to 3 weeks remote work
- Company-subsidized Medical (Kaiser or Anthem) for employees & dependents
- Guardian Dental and Vision insurances for employee & dependents
- life insurance (employee only)
- HSA and FSA offerings via Lively
- Roth IRA/ 401K (or both) retirement plans with up to 5% company contribution to 401K (even if you don't contribute)
- 100% company-paid life insurance (up to $300K)
- long-term disability insurances
- $1500 Professional Development Budget (per year)
- Onsite team lunch & dinner Monday - Friday
- Commute on our company Uber account, or reimburse your train rides. Either way, we pay 100% for your daily commute.
- $50/mo to use on the perk you value most
- $35/mo for cellular and $40/mo for wifi
- 100% paid mental health benefit via SpringHealth and Guardian EAP.
- Up to 12 weeks paid parental leave regardless of path to parenthood
- 10 weeks pregnancy disability leave
- flexible return-to-work hours
- Benepass reproductive health & parental benefit.
- Up to $20K/month plus a dedicated internal AI Tooling Team to support your productivity
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What This Job Offers
Job Type
Full-time
Career Level
Entry Level
Education Level
No Education Listed
