3D IC and SoC CAD ENGINEER

Advanced Micro Devices, Inc•Austin, TX

4d•Hybrid

About The Position

Our CAD team delivers automated environments for industry-leading methodologies for 3D IC stack and advanced packaging design. Our flows encompass 3D netlist and physical design, advanced packaging implementation, and 3D analysis across EMIR, PERC/ESD, physical verification, and STA. 3D design and advance packaging complexity continue in increase. AMD designs are complex heterogeneous systems requiring a mix of specialized in-house capabilities while leveraging best in class EDA vendor solutions. This role is part of a global CAD team working in concert with mulitple design teams. You will collaborate directly with project teams to understand design requirements and deliver innovative solutions. The ideal candidate brings a strong silicon hardware design background, scripting proficiency, and hands-on experience applying machine learning to CAD or EDA workflows.

Requirements

Strong understanding of industry EDA tools, with emphasis on place-and-route, extraction, and analysis tools (e.g., ICC2, Innovus, Primetime, etc.).
Familiarity with chip- or system-level netlists and ability to debug connectivity across industry-standard formats (DEF/LEF/SPEF/Verilog/UPF/OAS/GDS).
Exposure with system level design verification processes including LEC, LVS, DRC, etc.
Comfort navigating large datasets and utilizing automation, distributed and cloud compute environments.
Strong scripting skills in Python, TCL, and Perl within a Linux/Unix environment.
Experience with advanced-node tapeouts across silicon technologies.
Bachelors or Masters degree in computer engineering/Electrical Engineering

Nice To Haves

Demonstrated experience applying AI (ML-based optimization, LLM-assisted automation, agentic frameworks) to CAD, EDA, or hardware design problems.
Exposure to Advanced Packaging technologies preferred (2.5D, 3D, 3.5D, including interposers and silcion bridges).
Exposure to chip-level construction (PDN, bump planning) and analysis a plus.
Excellent verbal and written communication skills.

Responsibilities

Implement and maintain 3D-IC and advanced packaging design flows from RTL through signoff.
Lead hands-on debug and automation involving large chip level physical and logical netlists.
Partner with EDA vendors (Synopsys, Cadence) on 3D-IC feature requirements, enhancement requests, and AI co-development opportunities.
Partake in deep-dive discussions to provide guidelines to various organizations across AMD.
Develop and integrate end-to-end AI capabilities into CAD flows — including ML-based optimization, predictive modeling, and LLM-assisted automation.
Define strategy and key initiatives to ensure flows meet future design requirements and advanced technology nodes.
Regress methodology, analyze results, and develop capabilities that measurably improve quality of results.
Work closely with design and CAD implementation teams to deliver tools and flows meeting key QoR metrics: Timing, Area, and Performance.