VLSI Design Verification Internship

Hewlett Packard Enterprise•Chippewa Falls, WI

5d•$35 - $41•Hybrid

About The Position

This role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from an HPE office. Our team develops HPE Slingshot, an industry-leading interconnect used in some of the world’s largest HPC and AI systems. As an intern, you’ll work alongside experienced architects, logic designers, and verification engineers on a switch or NIC ASIC verification project for a future generation of Slingshot. You’ll learn industry-standard SystemVerilog and UVM verification techniques, participate in technical design and debug discussions, and see how our team is applying emerging agentic AI workflows to solve complex engineering problems. We are looking for students interested in careers in design verification, HPC and AI systems, or high-performance interconnects. Ideal candidates will have ASIC or VLSI experience through university coursework, industry experience, or self-study. Experience with agentic AI coding tools and workflows is preferred but not required.

Requirements

Pursuing a bachelor’s or master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field
Coursework in digital design and computer architecture
Experience with object-oriented programming
Strong analytical and problem-solving skills
Clear written and verbal communication skills
Willingness to ask questions, explain your reasoning, and participate in technical discussions

Nice To Haves

Experience with a hardware description language such as Verilog, SystemVerilog, or VHDL
Experience with Python, Perl, Tcl, or another scripting language
Experience working in Linux development environments
Academic, research, or personal projects involving digital hardware
Experience working as part of a distributed team
Experience with agentic AI coding tools and workflows

Responsibilities

Develop SystemVerilog and UVM testbench components, including models, monitors, scoreboards, and checkers
Write constrained-random tests
Develop and analyze functional coverage to identify verification gaps
Debug regression failures and help identify, log, and resolve logic bugs
Work directly with ASIC designers and architects
Use scripting, automation, and AI-assisted tools to improve the verification process