Verification Software Engineer

Qualcomm • San Diego, CA

1d • $94,200 - $141,200

About The Position

Qualcomm’s Modem/Chiplet Validation & Emulation (SVE) team is part of the central SoC validation organization responsible for ensuring end-to-end silicon quality across pre- and post-silicon phases. This role focuses on content quality, validation frameworks, and system-level validation enablement, offering deep exposure to Qualcomm SoCs through bare-metal validation content, scalable automation frameworks, and complex system debug. Engineers in this role work across HW and SW boundaries to develop, validate, and scale system-level test content, ensuring high-quality silicon validation across a wide range of SoC domains. This is an excellent opportunity to work on cutting-edge SoCs & RF Chips across multiple product segments, including data center-class silicon and premium mobile and flagship platforms. You will gain exposure to diverse system architectures, workloads, and performance/power challenges across domains, with the ability to build scalable validation solutions that extend from mobile to server-grade systems.

Requirements

• BS in Electrical, Computer Science, or the equivalent.
• SoC/System Validation Expertise – End-to-end pre-silicon and post-silicon validation, bring-up, system integration, and silicon debug.
• Hardware-Software Co-Debug – Strong debugging across SoC architecture, embedded software, firmware, drivers, and hardware interfaces.
• Validation Content & Framework Development – Design scalable test content, automation frameworks, analysis, and debug infrastructure.
• Low-Level Programming – Proficiency in C/C++, Python, Assembly, Linux, device drivers, and bare-metal software development.
• Pre-Silicon Platforms – Experience with simulation, emulation (Veloce/FPGA), RTL understanding, and validation readiness.
• Knowledge of Modem, RF or SERDES high speed interfaces, clock/power management, low-power modes, and performance architecture.
• Performance, Power & Concurrency Analysis – System-level validation of bandwidth, latency, QoS, throughput, scalability, and power-performance tradeoffs.
• AI-Driven Validation – Applying AI learning/ML to improve validation/debug and log analysis productivity.
• AI- Driven code development – Use your coding skills to guide the AI model to create consistent high quality code for drivers, test plans, debug etc.
• Lab & Debug Tools – Hands-on experience with JTAG, logic analyzers, oscilloscopes, kernel debuggers, and silicon debug methodologies.
• Technical Leadership & Cross-Functional Collaboration – Work effectively across architecture, design, firmware, software, and validation teams to drive silicon quality.
• General understanding of Modem baseband purpose and layer 1 processing (I/Q, Symbols, bits).
• General understanding of RF baseband (y1y2, I/Q) and IF functionality for 4/5/6G processing.
• Working understanding of RF front end and RF test equipment.
• Basic understanding of Digital to analog/SERDES environment.
• Bachelor's degree in Engineering, Information Systems, Computer Science, or related field.

Nice To Haves

• This position is not eligible for Qualcomm immigration sponsorship.
• Open to new graduates and individuals with a few years of experience.

Responsibilities

• Design and enhance digital baseband verification code.
• Work with Modem HW designers to create C/Python code to test HW engines.
• Build infrastructure for functional verification of the baseband HW that can be leveraged into performance tests, concurrency and stress testing.
• Improve framework capabilities for reproducibility and debug turnaround, performance and scalability across SKUs/platforms.
• Analyze & debug failures.
• Design and enhance digital baseband verification code.
• Work with RF HW designers to create C/Python code to test HW engines from System Vectors.
• Build infrastructure for functional verification of the RF HW that can be leveraged into performance tests, concurrency and stress testing.
• Improve framework capabilities for reproducibility and debug turnaround, performance and scalability across SKUs/platforms.
• Analyze & debug failures.
• Design and enhance scalable validation frameworks for bringing up a high-speed digital link.
• Develop and create logging and failure analysis.
• Collaborate with the SERDES and digital designers to translate analog/digital requirements into C code.
• Build infrastructure for driver development of the (custom) High Speed link, concurrency and stress testing.
• Improve framework capabilities for reproducibility and debug turnaround, performance and scalability across SKUs/platforms.
• Analyze & debug failures.

Benefits

• Competitive annual discretionary bonus program
• Opportunity for annual RSU grants
• Highly competitive benefits package designed to support your success at work, at home, and at play.

What This Job Offers

• Job Type: Full-time
• Career Level: Entry Level