Test Engineer

Texas Instruments•Santa Clara, CA

5d•$157,000 - $181,500•Onsite

About The Position

Texas Instruments (TI) is seeking a Test Engineer for a full-time role in Santa Clara, California. Test is a crucial time in an IC development process; if you find a bug or an issue, it is a good time to fix it, but every additional second of testing we do, is additional cost when you scale a device into production. So, test engineers must identify the critical points of the device where testing is most necessary and the points where we may want to take some risk. It is a precise balance, that has the potential to save our businesses millions of dollars!

Requirements

Design ATE (Automatic Test Equipment) hardware interface boards (FT and Probe).
Debug characterizing silicon on ATE, correlate results with bench data.
Analyze silicon results and setting test limits.
Work with design team to understand design specifications.
Generate test plan, create ATE samples, Qual, char and production test programs.
Perform statistical analysis of yield fallout, debug and fix yield issues; optimize test time.
Work with production team across the globe to release products to volume production.
Test strategy and DFT (Design for Testability) definition and implementation for new RF and Clocking products.
Comprehensive device debugging and design validation.
Drive for manufacturing efficiency with robust and cost-effective test solutions while being accountable for product quality.

Responsibilities

Design ATE (Automatic Test Equipment) hardware interface boards (FT and Probe).
Debug characterizing silicon on ATE, correlate results with bench data.
Analyze silicon results and setting test limits.
Work with design team to understand design specifications.
Generate test plan, create ATE samples, Qual, char and production test programs.
Perform statistical analysis of yield fallout, debug and fix yield issues; optimize test time.
Work with production team across the globe to release products to volume production.
Test strategy and DFT (Design for Testability) definition and implementation for new RF and Clocking products.
Comprehensive device debugging and design validation.
Drive for manufacturing efficiency with robust and cost-effective test solutions while being accountable for product quality.