Test Development Engineer

Allegro MicroSystems•Manchester, NH

5d•Hybrid

About The Position

Allegro Microsystems is looking for an enthusiastic Test Development Engineer to join our Product and Test Engineering team. In this role, you will work closely with senior test engineers, IC designers, and product engineering teams to develop automated test solutions—including C++ test programs and custom hardware interface boards—used to test our high-performance mixed-signal integrated circuits (ICs) during wafer probe and final package manufacturing. This is an exciting, hands-on opportunity to build expertise in semiconductor Automated Test Equipment (ATE), first-silicon bring-up, and production release in a collaborative, supportive environment.

Requirements

Bachelor’s or Master’s degree in Electrical Engineering (EE), Electrical & Computer Engineering (ECE), Electrical Engineering Technology (EET), or a closely related field.
0 to 5 years of academic, internship, co-op, or industry experience in electronics testing, hardware lab bring-up, or semiconductor environments.
Foundational knowledge of C/C++ (object-oriented programming) and/or Python for test execution, scripting, and data collection.
Solid understanding of analog and mixed-signal circuits, with hands-on proficiency using standard lab test equipment (oscilloscopes, power supplies, multimeters).
Basic exposure to schematic capture and PCB layout fundamentals (e.g., Altium, OrCAD, KiCad, or similar tools).
Strong analytical problem-solving skills, attention to detail, eagerness to learn complex mixed-signal systems, and the ability to collaborate effectively with a One Allegro mindset.

Nice To Haves

Hands-on exposure to semiconductor Automated Test Equipment (ATE), particularly Teradyne / Eagle Test Systems (ETS-88, ETS-364, ETS-800), Advantest, or Cohu platforms.
Familiarity with wafer probers (e.g., TEL) or automated IC handlers.
Exposure to semiconductor data formats (STDF) and statistical process control concepts (e.g., normal distributions, , Gage R&R, JMP).
Coursework or project experience in power electronics, sensor interfaces, semiconductor physics, or Design for Testability (DFT).

Responsibilities

Collaborate with senior engineers to write, debug, and maintain modular test programs in C/C++ on Automated Test Equipment (ATE) to evaluate analog and mixed-signal sensor and power ICs.
Assist in the design, schematic capture, and checkout of custom test hardware, including Device Interface Boards (DIBs/loadboards), probe interface boards (PIBs), probe cards, and socket hardware.
Participate in first-silicon bring-up, collecting correlation data to validate bench measurements against ATE results across operating temperature ranges.
Perform statistical data analysis (using tools like JMP, Python, or Excel) to evaluate Gage R&R, characterize parametric distributions, identify test yield issues, and support test-time reduction (TTR) efforts.
Partner with IC Design, Product Engineering, Quality, and global manufacturing teams (including AMPI) to release robust, automotive-grade test solutions into high-volume manufacturing.
Use standard bench instrumentation (oscilloscopes, arbitrary waveform generators, DMMs, power supplies) and thermal systems to debug hardware and software test routines.