Technical Staff Engineer - Emulation

Microchip•San Jose, CA

2d•Remote

About The Position

Microchip’s Data Center Solutions (DCS) Business Unit offers industry-leading performance, reliability, and security for Storage Controllers, PCIe Switches, and NVMe solutions. As a Technical Staff Emulation Engineer, you will provide technical leadership for our Enterprise Flash Controller product line. You will be responsible for architecting and executing emulation strategies for complex $300M+$ gate devices that power next-generation data centers and accelerators. The ideal candidate will have a deep background in SoC emulation specifically related to Enterprise Flash Controllers, switching, and memory attachment. You will work closely with internal and external customers, as well as cross-functional engineering teams, to support both current and next-generation products. At Microchip, we foster continuous learning in a challenging and rewarding environment. If you are looking for an opportunity to innovate and lead in a high-impact space, we’d like to hear from you!

Requirements

Bachelor’s degree in Electrical or Computer engineering (Master’s degree preferred)
12+ years of relevant industry experience in ASIC development, emulation.
Excellent problem solving and debugging skills
Excellent verbal and written communication skills
Teamwork and time management skills, setting direction, the ability to work under pressure and the desire to excel in a competitive environment
Experience with all aspects of the SoC/ASIC emulation, and verification flow
Experience with PCIe based Enterprise Flash Controller design
Experience with emulation platforms , preferably Cadence Palladium and Protium emulation platforms
Experience with ARM, RISC-V and/or MIPS CPUs is an asset
Experience with PCIe, DDR, and ONFI/Toggle NAND is desired
Experience with on-chip interconnect and cache coherency

Responsibilities

Develop our next generation Data Center Storage products, including enterprise class NVMe Solid State Drive (SSD) controllers and other PCIe based products
Provide technical leadership through all phases of silicon ASIC development
Work with industry standard protocols such as PCIe, ONFI, AMBA AXI, SAS and DDR4/5 and third party Accelerated Verification Ips (AVIPs).
Evaluate emulation platforms and provide recommendations.
Build and maintain emulation platforms with design variants.
Support emulation activities in pre and post silicon development phases.
Staying current on the latest SOC trends and innovations and incorporating them into emulation flows.
Develop Simulation Acceleration testbenches using Cadence Palladium flow and Support emulation bring up and post silicon debug.
Work on Universal Verification Methodology (UVM) based testbench architecture, test plan development, simulation and coverage.
Develop C based testcases at full chip and review of architectural and micro architecture specifications.
Develop synthesizable Bus Functional Models (BFM) for various protocols and interfaces used in SoC design and emulation.
Debug and root cause design, testbench and emulation platform related issues.