Technical Leader Component Engineering San Jose, CA Hybrid

Cisco • San Jose, CA

1d • Hybrid

About The Position

The Cisco Component Quality and Technology team provides outstanding customer value through technical innovation and quality solutions. We are seeking a driven and experienced technical expert in semiconductor component reliability. You will work directly with Cisco design, manufacturing, operations and quality engineering teams, as well as component vendors to ensure the quality and reliability of semiconductor components used by Cisco. This is a hybrid position.

Requirements

• Bachelor's degree in Electrical Engineering or Material Science or related fields
• 5+ years of experience in semiconductor component reliability
• Knowledge of semiconductor design, fabrication, characterization, qualification, testing, quality, reliability and failure analysis

Nice To Haves

• 8+ years of experience in semiconductor component reliability
• Masters’ degree in Electrical Engineering or Material Science or related fields
• Deep knowledge of semiconductor device reliability testing methods, such as HTOL, ELFR, LU, ESD and NBT
• Deep knowledge of Memory Subsystem RAS (Reliability, Accessibility, and Serviceability)
• Experience in investigating component failures across NPI, mass production, and field returns, with knowledge of sophisticated FA techniques.
• Extensive experience collaborating with and influencing stakeholders including hardware and software engineering, operations and manufacturing.

Responsibilities

• Define and execute comprehensive qualification strategies for semiconductor components, including Memory, ASIC, CPU and FPGAs to ensure they meet Cisco’s rigorous performance, quality and field reliability standards across the entire supply chain.
• Collaborate with cross-functional teams on component selection, design reviews, risk assessment, and proactive risk mitigation.
• Lead deep-dive investigations into complex semiconductor component failures, drive root-cause analysis, characterize failure mechanisms to a transistor level and create & verify corrective and preventive actions (8D, RCCA, etc.)
• Architect and drive implementation of Reliability, Accessibility, and Serviceability (RAS) of memory subsystems.

Benefits

• medical, dental and vision insurance
• a 401(k) plan with a Cisco matching contribution
• paid parental leave
• short and long-term disability coverage
• basic life insurance
• grants of Cisco restricted stock units
• 10 paid holidays per full calendar year
• 1 floating holiday for non-exempt employees
• 1 paid day off for employee’s birthday
• paid year-end holiday shutdown
• 4 paid days off for personal wellness
• 16 days of paid vacation time per full calendar year (non-exempt)
• flexible vacation time off program (exempt)
• 80 hours of sick time off provided on hire date and each January 1st thereafter
• up to 80 hours of unused sick time carried forward
• Optional 10 paid days per full calendar year to volunteer
• annual bonuses (for non-sales roles)

What This Job Offers

• Job Type: Full-time
• Career Level: Senior