Systems SERDES Engineer, Senior Staff

Qualcomm • Toronto, ON

6d

About The Position

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.

Requirements

• Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
• Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
• PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
• 5+ years of previous experience with modelling critical SERDES blocks such as Transmitter, FFE, CTLE, DFE, and CDRs
• Strong programming skills in MATLAB, C/C++, scripting skills in Python, Tcl, Perl
• Experience working with PCIe and/or Ethernet SerDes specifications

Nice To Haves

• IBIS-AMI modelling experience
• Familiarity with PCI-SIG, IEEE 802.3 and OIF standards
• Extremely detail oriented
• Superb analytical and problem-solving skills
• Excellent communication skills
• Able to listen to and appreciate ideas and opinions that differ from yours
• Drive for consistency
• Takes personal pride in high standard of outputs
• Self-motivated and self-managing

Responsibilities

• Run behavioral channel simulation and analysis of high-speed wireline analog/DSP SERDES for 100G+ PAM4 standards
• Model complex analog blocks, such as Transmitter, FFE, CTLE, DFE, and CDRs
• Contribute to Architecture definition for SERDES links for several standards
• Develop and deploy tools for analog / validation teams to speed up design and debug
• Work with state-of-the-art optimization and machine learning algorithms for chip optimization
• Contribute to and help develop adaptation algorithms for a variety of equalization techniques
• Perform sensitivity analysis and regression simulations for various link conditions
• Work with internal silicon engineering team to help perform system performance correlation between behavior models and silicon

What This Job Offers

• Job Type: Full-time
• Career Level: Senior