System Performance Architect

Qualcomm • San Diego, CA

2d • $145,600 - $218,400

About The Position

Qualcomm Technologies, Inc. is seeking an experienced System Performance Architect to lead system performance explorations for next-generation mobile, AI, and CPU server SoCs. The role drives architecture exploration from early concept through post-silicon and partners closely with architecture, design, and software teams. As part of Qualcomm’s ASIC Engineering organization, the position contributes to defining, modeling, designing, optimizing, verifying, validating, implementing, and documenting IP development for high-performance, high-quality, low-power products, in collaboration with cross-functional teams.

Requirements

• At least 6 years of experience in performance modeling, memory architecture, or system architecture.
• Solid understanding of SoC architecture, NoC/fabric architecture, and memory subsystems.
• Proficiency in performance exploration planning and analysis for complex SoC designs.
• Strong C++ proficiency.
• Solid understanding of memory hierarchies and DRAM systems.
• A bachelor's degree in science, engineering, or a related field and 4+ years of ASIC design, verification, validation, integration, or related work experience; or a master's degree in one of these fields and 3+ years of related experience; or a PhD in one of these fields and 2+ years of related experience.

Nice To Haves

• Experience with SystemC/TLM modeling.
• Experience with AI/ML, GPU, or HPC-class SoCs.
• Familiarity with post-silicon performance analysis and silicon correlation.
• Ability to translate performance data into clear architectural recommendations.

Responsibilities

• Define and execute system-level performance analysis of infrastructure architecture features, memory-controller behavior, and system-level trade-offs in pre-silicon simulation environments.
• Identify performance bottlenecks across interconnect, caches, and compute, and propose architecture improvements.
• Contribute to performance sign-off activities, project deliverables, technical reviews, and automation.
• Define methodologies, metrics, and KPI frameworks for workload analysis, performance tracking, and feature evaluation.
• Collaborate with SoC, NoC, memory-controller, design verification, power, and software teams to influence design decisions.
• Identify hardware and software optimization opportunities and drive recommendations to architecture, design, compiler, OS, firmware, and application teams.
• Research and track industry trends and innovations in memory architecture, including HBM, 3D-stacked memory, and advanced packaging.

Benefits

• Competitive annual discretionary bonus program.
• Opportunity for annual RSU grants, except for employees on sales-incentive plans.
• Competitive benefits package designed to support employees at work, at home, and at play.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level