System Engineer

Iceye Us•Irvine, CA

4d•Onsite

About The Position

System Engineer At ICEYE, we design, build and operate the largest fleet of Synthetic Aperture Radar (SAR) satellites in the world. Using advanced technology, our constellation collects topographical data about any location on Earth, day or night, through any weather conditions. Headquartered in Southern California, our customers are society’s heroes – intelligence professionals, warfighters, first responders, and scientific researchers. As a trusted mission partner, the United States and its allies depend on us for critical information when it matters most. Role Description ICEYE US is developing next-generation spaceborne SAR radar payloads and needs a Systems Engineer / Architect to own the full systems engineering lifecycle — from mission concept through flight readiness. This role sits within the Space Systems team and is the single point of accountability for payload-level architecture, requirements, verification, and reliability. You will work daily with RF, digital, and mechanical design engineers, the software team, and program leadership to ensure the payloads are designed, built, and verified to meet mission objectives. This is not a paper-pushing SE role — you will drive architectural trade studies, define avionics interfaces, shape fault management strategies, and be deeply technical across the full payload stack.

Requirements

7+ years of systems engineering experience on space, radar, or avionics programs with at least 2 years in a system architect role
5+ years Demonstrated experience leading FMEAs and reliability analyses for flight hardware.
5+ years of hands-on experience with requirements decomposition, management, and verification closure.
2+ years working knowledge of radar or RF.
5+ years experience defining and tracking system-level budgets (link, mass, power, thermal) through full design lifecycle
Bachelor's degree in Electrical Engineering, Aerospace Engineering, Systems Engineering, or related field.

Nice To Haves

Experience with SAR (Synthetic Aperture Radar) mission design and performance analysis
Background in fault management / FDIR design for LEO or MEO missions
Familiarity with embedded flight software concepts (FPGA, real-time OS, command/telemetry protocols)
Experience with avionics bus architectures (SpaceWire, MIL-STD-1553, CAN, SPI/LVDS)
Exposure to NASA (NPR 7123) or DO-178, DO-330
Experience supporting or leading qualification and acceptance test campaigns for space hardware
Understanding of manufacturing readiness and production transition for space hardware.
Master's degree in a relevant engineering discipline

Responsibilities

Define and maintain the payload system architecture including avionics.
Decompose mission and system-level requirements into subsystem and interface specifications; maintain full traceability through verification closure
Lead FMEA and reliability analyses at system and subsystem level; identify single-point failures and drive redundancy or mitigation decisions
Design the fault management architecture including FDIR strategies, safe modes, and anomaly response aligned to mission ConOps
Establish and track Technical Performance Measures (mass, power, thermal, link, data rate budgets); flag margin erosion and drive resolution
Own the V&V strategy and map every requirement to its verification method (test, analysis, inspection, demonstration) across design gates (PDR → CDR → TRR → FRR)
Develop and refine mission ConOps including orbit geometry, imaging modes, duty cycles, and ground segment interfaces
Define and control inter-subsystem and payload-to-bus ICDs.
Collaborate with software engineers on embedded flight software architecture, command/telemetry definitions, and mode transitions
Partner with the product team to translate product roadmap objectives into system-level technical requirements and trade spaces.
Support and present at formal design reviews (SRR, PDR, CDR, TRR, MRR, FRR) with complete artifact packages
Perform system-level budget and trade analyses to inform make-vs-buy, design margin, and cost-schedule-performance decisions