Standard Cell Design Flow and CAD Engineer (Senior Level)

Qualcomm • San Diego, CA

3d

About The Position

Qualcomm is seeking a highly motivated and skilled Senior CAD Engineer to join the Standard Cell IP team. This role focuses on developing, enhancing, and supporting critical infrastructure for standard cell library production and validation flows. The engineer will play a key role in standard cell library development by enabling robust production and signoff methodologies, as well as delivering innovative, scalable, flow‑based layout customization solutions.
The position also includes responsibility for defining, maintaining, and enforcing design specifications for custom standard cells. The role requires close collaboration with IP design, CAD, and technology teams to enable high‑productivity design flows and robust IP validation across a broad range of Qualcomm products.

Requirements

• Bachelor's Degree in Computer Science, Mathematics, Electrical Engineering, or a related discipline.
• Foundational understanding of CMOS technology and integrated circuit (IC) design principles.
• Strong attention to detail, with the ability to work effectively in a collaborative, cross‑functional engineering environment.
• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
• Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
• PhD in Science, Engineering, or related field.

Nice To Haves

• Bachelor’s degree in Computer Science, Electrical Engineering, or a related field.
• Working knowledge of physical verification and extraction tools and languages, including DRC, LVS and parasitic extraction flows (e.g., SVRF/TVF ).
• Familiarity with foundry PDK and their internal components and technology files.
• Experience with scripting and automation languages such as SKILL and Python for layout development, customization, and optimization.

Responsibilities

• Design, develop, and sustain internal CAD flows supporting standard cell library development, customization, and signoff.
• Apply strong engineering judgment and creativity to validate custom standard cell layouts, ensuring compliance with power, performance, and area (PPA), place‑and‑route (P&R), and reliability requirements across advanced technology nodes.
• Architect and maintain systematic, scalable, and automation‑driven flows for standard cell layout customization and library production.
• Serve as a key technical interface with internal CAD teams and external foundry partners to enable timely adoption of new PDKs into production‑ready standard cell flows.
• Perform advanced data analysis and post‑development library assessments to identify quality gaps, reinforce design specifications, and drive continuous improvement of standard cell IP deliverables.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level