Technology Development Foundry Engineering – Staff Yield Engineer

Intel•Hillsboro, OR

10d•Hybrid

About The Position

At the heart of Intel's groundbreaking product advancements, the Logic Technology Development (LTD) organization is a powerhouse of process technology innovation. Our relentless pursuit of excellence and innovation propels Intel's Foundry strategy, ensuring that we not only meet but exceed the aspirations of our global customers. As we continue to lead the semiconductor industry, we are enhancing our technological capabilities to guarantee the triumph of our customers' diverse and ambitious projects. Your Role in Intel's Foundry Revolution: As a Foundry Technology Development - Staff Yield Engineer, you will be at the forefront of Intel's collaborative journey with our foundry partners. Your expertise will be pivotal in guiding our customers through the intricate journey of product development, starting from testing and validation to New Product Introduction (NPI) phase to the High Volume Manufacturing (HVM). You will play a vital role in overseeing the wafer manufacturing process and ensuring a seamless transition into volume production. This is a unique opportunity to be part of a team that is not just participating in the industry but actively shaping its future. We are seeking a broad range of semiconductor expertise across the range of foundry technology development. Based on experience, potential areas may include: Serve as the yield point of contact through the cycle of foundry product development, from design to initial High Volume Manufacturing (HVM) Define yield goal and roadmap for foundry customer silicon by collaborating with Intel Foundry Services (IFS), Technology Development (TD), and Product Integration Collaborate with TD Process Integration, Device, Defect Metro, and Lab to identify yield detractors and yield enhancement opportunities, specifically for foundry customer silicon Provide yield / defect density projection for different types of customer silicon, including test chips, shuttles, and products Track inline process and non-process changes to incorporate the changepoints into yield prediction model Develop yield models to identify potential parametric and defective loss components and support Process Integration, Device and Module teams to develop projects to eliminate systematic yield losses Support yield analysis of logic, SRAM, and other types of devices on foundry customer silicon Establish correlations between critical inline metrics and yield for better inline control and end of line projection Engage side-by-side with Product Integration and Device teams in customer silicon execution, such as skew split planning and DOE Lead investigations and root-causing on yield signals for foundry customer silicon Identify opportunities to optimize foundry product development operational systems and methodologies to improve efficiency and standardization Work as the technical interface between foundry and both internal stakeholders and external customers

Requirements

Bachelor’s Degree in Electrical Engineering, Materials Science, Physics, Chemical Engineering or other relevant engineering or physical science discipline with 6+ years of relevant work experience OR Master's Degree in Electrical Engineering, Materials Science, Physics, Chemical Engineering or other relevant engineering or physical science with 4+ years of relevant work experience OR PhD Degree in Electrical Engineering, Materials Science, Physics, Chemical Engineering or other relevant engineering or physical science discipline with 2+ years of industry experience
Semiconductor yield engineering
Analysis of yield post silicon yield signal and root-causing

Nice To Haves

3+ years of semiconductor direct yield analysis and engineering experience
3+ direct experience in yield pareto, projection and yield roadmap construction
3+ years of experience within a foundry team, or foundry customer yield collaboration
3+ years of experience interpreting product data including inline, e-test and SORT data, finding failure root cause and inline indicator and driving for solutions
Knowledge on inline inspection method, electrical test structures and SORT programs
Exposure to fabless design house product development
Foundry customer service experience and evidence of strong customer orientation.

Responsibilities

Serve as the yield point of contact through the cycle of foundry product development, from design to initial High Volume Manufacturing (HVM)
Define yield goal and roadmap for foundry customer silicon by collaborating with Intel Foundry Services (IFS), Technology Development (TD), and Product Integration
Collaborate with TD Process Integration, Device, Defect Metro, and Lab to identify yield detractors and yield enhancement opportunities, specifically for foundry customer silicon
Provide yield / defect density projection for different types of customer silicon, including test chips, shuttles, and products
Track inline process and non-process changes to incorporate the changepoints into yield prediction model
Develop yield models to identify potential parametric and defective loss components and support Process Integration, Device and Module teams to develop projects to eliminate systematic yield losses
Support yield analysis of logic, SRAM, and other types of devices on foundry customer silicon
Establish correlations between critical inline metrics and yield for better inline control and end of line projection
Engage side-by-side with Product Integration and Device teams in customer silicon execution, such as skew split planning and DOE
Lead investigations and root-causing on yield signals for foundry customer silicon
Identify opportunities to optimize foundry product development operational systems and methodologies to improve efficiency and standardization
Work as the technical interface between foundry and both internal stakeholders and external customers