Staff Wireless IC Digital Designer

Analog Devices • Dallas, TX

1d • Onsite

About The Position

As a Senior Staff Wireless IC Digital Designer, you will lead the development of RF/wireless design for ADI’s medical, energy, and embedded security ICs. You will have the opportunity to be involved in all the significant phases of RF SOC product development cycles, including product definition, RF system design, RF circuit design, and RF software implementation. A successful candidate must be an expert on communication systems, DSP concepts, wireless digital baseband design, and the full silicon and production development flow. Candidate must have experience in modern wireless system digital design, bit-level modeling, and simulation for trade-off analysis and performance evaluation. This position will also help the business team to support customers on critical issues and win new customers.

Requirements

• System Architecture: Expert ability to define and implement complex digital system architectures
• Technical Leadership: Demonstrated capability to provide technical direction to engineering teams
• Multi-Domain Expertise: Deep knowledge across multiple technical domains relevant to digital design
• Methodology Expertise: Authority in digital design methodologies with ability to drive improvements
• Cross-Functional Collaboration: Strong capability to work across organizational boundaries
• Customer Engagement: Experience translating customer needs into technical requirements and solutions
• Expert on communication systems, DSP concepts, wireless digital baseband design, and the full silicon and production development flow.
• Experience in modern wireless system digital design, bit-level modeling, and simulation for trade-off analysis and performance evaluation.

Responsibilities

• Support the development of product requirements and specifications.
• Analyze and develop SoC architectures to meet PPA (Power, Performance & Area) requirements.
• Author RFIC system architectures and associated documentation
• Perform RTL design of block-level IP.
• Perform RTL design and integration of RFIC architectures.
• Simulate RTL at the block level and SoC level to guarantee design functionality.
• Simulate and debug gate-level timing simulations at the SoC level.
• Define SoC, system, and block-level verification plans for the radio.
• Perform synthesis, STA, LEC, and ATPG pattern generation.
• Oversee the physical design of the SoC.
• Complete FPGA verification for Radio IP before tape out
• Characterizing and validating circuit performance in the lab
• Providing support for high-volume manufacturing and working with Product and Test teams to transfer ICs to production.

Benefits

• competitive compensation and benefits
• work-life balance
• opportunity to work on cutting-edge projects that make a real impact on the world.
• supportive environment focused on professional growth
• continuous advancement and professional growth
• beneficial programs
• aligned goals
• continuous learning opportunities
• practices that create a more sustainable future.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior