Staff/ Senior Staff NPI Debug Engineer

AlteraSan Jose, CA
$149,100 - $215,000Onsite

About The Position

Altera is seeking a Staff / Senior Staff NPI (New Product Introduction) Debug Engineer to serve as a key senior technical leader for our most critical hardware investigations. In this high-impact role, you will take point on complex NPI escalations, leading cross-functional debug taskforces to resolve gating silicon issues across silicon, design, and test domains. You will share taskforce leadership responsibilities with other senior members of the team, acting as the primary orchestrator for investigations that heavily involve analog, mixed-signal, and power delivery challenges. This is a highly technical senior individual contributor role requiring a unique blend of deep hardware debug expertise, yield analysis proficiency, and strong crisis-management skills. You will analyze complex issues firsthand, define fault trees, guide parallel investigations across global engineering teams, and present root-cause findings to executive leadership.

Requirements

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, Physics, or related technical field.
  • 6+ years of experience in hardware debug, NPI engineering, product/yield engineering, or system validation
  • 6+ years leading technical taskforces to resolve critical silicon, hardware, or yield issues under tight schedules.
  • 6+ years of experience driving yield analysis and yield improvement for semiconductor, FPGA, SoC, or complex hardware products.
  • 6+ years of data analysis experience using Python, JMP, or equivalent

Nice To Haves

  • Master’s or PhD in Electrical Engineering, Electronics, Physics, or related field.
  • Strong background in analog and mixed-signal debug
  • Familiarity with fault isolation (FI) and failure analysis (FA) techniques
  • Exceptional technical communication skills; capable of translating highly technical, multi-disciplinary debug data into clear risk assessments and action plans for leadership.

Responsibilities

  • Drive Debug Taskforces: Act as the technical lead and orchestrator for designated cross-functional "tiger teams" formed to solve critical NPI blockers, especially those involving complex analog, power, or signal integrity interactions.
  • Define the Debug Strategy: Develop comprehensive fault trees, design of experiments (DOEs), and parallel investigation paths. Assign clear ownership across Design, Product, Test, Validation, and Manufacturing teams.
  • Synthesize Complex Data: Aggregate and analyze findings from simulation/circuit analysis, ATE test data, failure analysis (FA) and yield signatures to rapidly close in on root cause.
  • Executive Communication: Lead taskforce syncs, maintain clear dashboards, and present high-level readouts, recovery schedules, and risk assessments to leadership.
  • Lead complex yield analysis activities directly related to NPI investigations, including yield pareto, parametric shift analysis, tester correlation, and statistical data review.
  • Identify systemic yield detractors and lead corrective actions across the foundry/fab, assembly, test, and design teams.
  • Influence test program development, diagnostic coverage, and outlier detection screening to prevent taskforce-level escapes.
  • Track yield by lot, wafer, and unit to proactively catch issues before they escalate.
  • Knowledge of advanced lab equipment, fault isolation and failure analysis tools to identify the best methodologies for debug and interpret the failure analysis data to direct the debug.
  • Guide experimental builds and validation of engineering fixes proposed by the taskforces.

Benefits

  • We also offer incentive opportunities that reward employees based on individual and company performance.
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