Staff Product and Test Engineer, PMIC

QualcommSanta Clara, CA
$151,900 - $227,900

About The Position

The Product Development and Test Engineering group develops test solutions for design verification of leading edge technologies and highly integrated radio frequency transceivers, power management, analog and mixed signal ASICs designed by Qualcomm. We work with Design, System, Foundry, Program Management, Yield, Reliability, Marketing, Sales and Manufacturing teams to create, commercialize and support Qualcomm’s products.

Requirements

  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
  • Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
  • PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Nice To Haves

  • Masters of Electrical Engineering Preferred.
  • Knowledge of Semiconductor manufacturing process.
  • Knowledge and hands on experience with statistical analysis software package and techniques, quality and reliability testing. Wafer fabrication fundamentals are a plus.
  • Solid understanding of electronics engineering fundamentals, digital, analog, mixed-signal, power management and RF circuit analysis techniques.
  • Working knowledge of Power Management IC (PMIC) measurement techniques such as line/load regulation, PSRR, transition time, power efficiency, jitter, phase noise, etc.
  • Good ASIC device level characterization skills. System level knowledge is a plus.
  • Able to work comfortably with lab equipment like Oscilloscopes, Source Meters, Battery Emulators, Spectrum analyzers, etc
  • Able to work independently and with good initiative to overcome technical challenges.
  • Strong verbal and written communications skills. Able to organize effectively and document work thoroughly while working with local and remote teams.
  • Strong software skills (VB, Python, Perl etc.) for writing and debugging test codes.
  • Expertise in LabView or hands on experience with Teradyne IFlex/UFlex or/and Advantest 93 ATE is a plus
  • Experience in Six Sigma Statistical process Control is a plus.

Responsibilities

  • Designing and debugging of test interface HW (load board), test SW (test program) development, HW/SW integration, characterization plan development, first silicon debug, process experiment (DOE) definition, multiple-source fab matching, device characterization, data analysis, product documentation/presentation, test limit (guard band) generation; driving failure analysis to completion, yield variance control.
  • Drive for short term and long term test time reduction and yield improvement to meet set goals without compromising production quality for multiple projects in parallel.

Benefits

  • Competitive annual discretionary bonus program
  • Opportunity for annual RSU grants
  • Highly competitive benefits package designed to support your success at work, at home, and at play.
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