Staff/Principal ATE Test Engineer
About The Position
We are seeking a highly experienced Principal ATE Test Engineer to lead test development and production test strategy for a high-performance integrated voltage regulator (IVR) semiconductor product line targeting advanced AI and HPC power delivery applications. This role is focused primarily on semiconductor test engineering, spanning DFT collaboration, characterization support, wafer probe, final test, hardware development, production ramp, and manufacturing optimization. The ideal candidate combines deep technical expertise in mixed-signal and power semiconductor test with strong leadership across silicon bring-up and high-volume manufacturing environments. The candidate is expected to operate as a senior technical leader capable of driving test strategy independently across internal teams and external manufacturing partners.
Requirements
- 10+ years in the semiconductor industry, with a proven track record developing manufacturing test solutions for high-volume semiconductor products.
- BS/MS in Electrical Engineering or related field
- Experience with mixed-signal and/or power management IC MFG test development
- Strong understanding of: Wafer probe and final test flows, Mixed-signal ATE methodologies, Yield analysis and characterization, Test hardware development, Test time optimization, OSAT manufacturing flows
- Experience with high-volume semiconductor manufacturing environments
- Strong debugging capability across silicon, hardware, software, and manufacturing domains
- Experience working with foundries and outsourced manufacturing/test partners
- Familiarity with PMBus, I2C, telemetry, and power management architectures
- Experience with Advantest, Teradyne, or Cohu mixed-signal/power ATE platforms
- Understanding of DFT methodologies for mixed-signal SoCs
Responsibilities
- Define overall manufacturing test strategy for IVR silicon across wafer probe and package final test
- Develop production screening methodologies for: Analog and mixed-signal circuits, Integrated ADCs and telemetry, Digital control and state machines, PMBus/I2C interfaces, OTP/eFuse programming, Protection and fault-management circuitry, Power-stage functionality and efficiency
- Partner with Design and DFT teams to ensure robust testability and manufacturability
- Lead development of wafer sort and final test solutions on production ATE platforms, including: ATE Test programs, Probe/load board hardware, Calibration methodologies, Thermal management approaches, Multisite test architectures
- Drive aggressive test time reduction while maintaining production quality targets.
- Support transition from engineering characterization flows into scalable high-volume production test
- Support first-silicon bring-up activities and debug of manufacturing test flows
- Support trim development, calibration algorithms, and production limit setting
- Debug silicon, hardware, and software issues observed during characterization and manufacturing ramp
Benefits
- Career track opportunity with potential for rapid advancement with strong performance as the firm grows
- 100% employer paid, comprehensive health care including medical, dental, and vision for you and your family.
- Paid maternity and paternity for 14 weeks at employees' normal pay.
- Unlimited PTO, with management approval.
- Opportunities for professional development and continued learning.
- Optional 401K, FSA, and equity incentives available.
- Mental health benefits are available through Tara Mind.
- Cost effective GLP-1 solutions available through Crux.
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What This Job Offers
Job Type
Full-time
Career Level
Senior
Education Level
Associate degree
