HBM SIPI, Staff Engineer

Micron • Richardson, TX

7d • Onsite

About The Position

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) is a division within the Technology and Products Group (TPG). We are dedicated to developing and optimizing High Bandwidth Memory (HBM) solutions for AI and ML applications. Using Through Silicon Via (TSV) technology, we stack multiple DRAM chips with a high-speed interface die, significantly increasing memory density and bandwidth for next-generation AI/ML accelerators and high-performance computing platforms. Our designs target the industry's lowest power-per-bit and highest bandwidth, enabling the most demanding compute workloads. We are looking for a SI/PI Engineer in HBM Design Architecture to execute high‑quality SI/PI analysis for interposers, packages, and silicon channels, contributing directly to HBM design sign‑off and product success. You will be involved in complex, multi-disciplinary SI/PI initiatives spanning multiple HBM product generations — from early interposer channel analysis and equalization co-design, PDN architecture, and system PI analysis. You will ensure Micron's HBM SI/PI architecture remains the industry benchmark for signal quality, power delivery integrity, and interface reliability.

Requirements

• 5 years of experience in signal integrity (SI) and power integrity (PI) modeling and analysis.
• Deep understanding of SI/PI, electromagnetic and transmission line theory, I/O design.
• Experience in circuit simulation such as Keysight ADS and Synopsys HSPICE.

Nice To Haves

• 7+ years of experience in signal integrity and power delivery network (PDN) modeling and analysis.
• Experience in SI/PI modeling and analysis for 2.5D/3D advanced packaging (CoWoS, EMIB, interposer-based designs), including time-domain analysis (eye diagram, BER, jitter decomposition, PDN) and frequency-domain characterization (S-parameters, PDN impedance)
• Experience with mask-based timing budget and jitter analysis with time-domain simulation (SPICE, ADS, etc)
• Experience with high-speed interfaces such as DDR, HBM, UCIe, PCIe, and SERDES.
• Proficiency in simulation and analysis using industry-standard EDA tools, including ANSYS HFSS/SIwave, Keysight ADS, Synopsys HSPICE, Cadence PowerSI/PowerDC.

Responsibilities

• Signal integrity channel analysis for 2.5D and 3D silicon interposer — including frequency-domain characterization (insertion loss, return loss, PSXT, IL-to-XT ratio) and time-domain analysis (eye diagram, BER, jitter decomposition)
• Conduct mask‑based timing analysis using time‑domain simulations (e.g., SPICE, ADS).
• Support power integrity and PDN analysis, including impedance modeling and transient response analysis.
• Electromagnetic extraction and modeling of signal and power delivery channels (PCB, Package, Interposers, etc.).
• Automate sign-off processes and work with EDA suppliers to improve tool accuracy and analysis flow.

Benefits

• choice of medical, dental and vision plans
• benefit programs that help protect your income if you are unable to work due to illness or injury
• paid family leave
• robust paid time-off program
• paid holidays

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Education Level: No Education Listed