Staff Engineer, SoC Emulation & Prototyping

Advanced Micro Devices, Inc•San Jose, CA

About The Position

The role focuses on planning, building, and executing verification of new and existing features for AMD graphics processor IP, with the goal of delivering a bug-free final design. The Staff Engineer defines and owns emulation architecture, methodology, and platform strategy for complex SoCs, and leads development and deployment of emulation platforms and their supporting verification and debug infrastructure. The position works across Architecture, RTL Design, Verification, Emulation, Software, and Firmware teams to enable early hardware validation, software bring-up, and functional coverage goals. It also provides technical leadership to emulation engineers, establishes engineering processes and standards, and represents the emulation team in technical and program discussions. The role partners with EDA and FPGA tool vendors to adopt technologies and resolve technical challenges.

Requirements

  • Bachelor’s or master’s degree in Computer Engineering or Electrical Engineering.

Nice To Haves

  • Proven experience leading emulation efforts for large-scale semiconductor programs.
  • Strong SystemVerilog and/or Verilog design and validation experience.
  • Hands-on experience with Synopsys Zebu and/or Cadence Palladium platforms.
  • Experience in FPGA design, implementation, and SoC prototyping.
  • Strong knowledge of SoC bring-up and high-speed interfaces such as PCIe, DDR, Ethernet, USB, and HBM.
  • Expert proficiency with AMD/Xilinx Vivado and Vitis toolchains.
  • Expertise in design reviews, modelling ASIC components that cannot be used on emulators, and coverage and power analysis on emulators.
  • Solid understanding of modern SoC architectures, including CPUs, cache hierarchies, memory subsystems, NoC/interconnects, and I/O protocols such as AXI, ACE, CHI, PCIe, and DDR.

Responsibilities

  • Define and own the emulation architecture, methodology roadmap, and platform strategy for complex SoCs, including partitioning, interconnects, clocking, debug infrastructure, and high-speed interfaces.
  • Lead development and deployment of emulation platforms, including RTL adaptation, implementation flows, verification infrastructure, regression environments, and system-level debug capabilities.
  • Collaborate across Architecture, RTL Design, Verification, Emulation, Software, and Firmware teams to enable early hardware validation, software bring-up, and functional coverage goals.
  • Provide technical leadership to emulation engineers through mentoring, design reviews, best-practice development, project planning, and execution of key program milestones.
  • Establish engineering processes, implementation methodologies, documentation standards, and continuous-improvement initiatives to improve efficiency, quality, and scalability.
  • Represent the emulation team in architecture reviews, program reviews, and customer-facing technical discussions.
  • Partner with EDA and FPGA tool vendors to drive technology adoption and resolve complex technical challenges.
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