Staff Engineer, GPU RTL Power Management

Samsung•Austin, TX

1d•Onsite

About The Position

Samsung, a world leader in advanced semiconductor technology, is founded on a simple philosophy – the endless pursuit of excellence will create a better world for all. At Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL), we are building a center of excellence for Intellectual Property (IP) that is applied to high-performance computing devices (mobile, automotive, and other custom market segments) consumed by millions of people around the world. Come build with us! As a Staff GPU RTL Design Engineer, you will contribute to the design and development of power management/SoC interface RTL blocks and subsystems for Samsung’s next-generation mobile GPU IPs, delivering high-quality, scalable implementations that power premium smartphones and adjacent consumer technologies. In this mid-to-senior individual contributor role, you will collaborate closely with hardware and software design teams and also partner with engineers in SoC team to drive the enablement of various power management features in production. You bring curiosity, RTL design knowledge, and microarchitectural understanding to support design decisions, resolve cross-block challenges, and ensure robust, production-ready GPU designs across multiple IP generations. You contribute to the microarchitecture definition and RTL implementation of power management GPU blocks and subsystems, translating architectural specifications into efficient, maintainable, and scalable hardware designs. You enjoy learning about the RTL lifecycle, help driving design from microarchitecture through RTL development, integration, debug, and simulation readiness while ensuring consistent execution across multiple functional areas and projects. You support technical excellence by driving design quality and accuracy, developing clean, synthesizable RTL, and collaborating with verification teams to enable thorough validation, resolve functional issues, and ensure coverage, robustness, and sustainability. You help resolving functional design challenges, working with architecture, physical design, and system-level teams including SoC team to address interface definition, timing, power, performance, and area tradeoffs early in the design cycle. You take initiatives on moderate-to-complex projects and help advance best practices, methodologies by exploring emerging GPU technologies and RTL design methodologies.

Requirements

6+ years of experience with a Bachelor’s Degree in Computer Science/Engineering, or 4+ years of experience with a Master’s Degree, or 2+ years of experience with a Ph.D.
4+ years of hands-on experience in power management or low power microarchitecture design for complex SoC, CPU, or GPU architectures.
Hands-on experience in RTL design using Verilog/SystemVerilog, including microarchitecture development, integration, and debug.
Working knowledge of GPU or high-performance digital design power management including IP power sequence, clock/reset control, clock domain crossing, and dynamic voltage and frequency scaling.
Familiarity with low power intent design for multi-voltage domain system.
Proficiency with scripting languages such as Python or Perl.
Strong analytical, and problem-solving skills, with the ability to identify and propose data-driven solutions.
Excellent written and verbal communication skills for technical documentation.
Excellent collaboration skills, with the ability to navigate ambiguity a fast-paced, global team environment.

Nice To Haves

Familiarity with the power management or boot sequence firmware of GPU or CPU.

Responsibilities

Contribute to the design and development of power management/SoC interface RTL blocks and subsystems for Samsung’s next-generation mobile GPU IPs.
Deliver high-quality, scalable implementations that power premium smartphones and adjacent consumer technologies.
Collaborate closely with hardware and software design teams and partner with engineers in SoC team to drive the enablement of various power management features in production.
Support design decisions, resolve cross-block challenges, and ensure robust, production-ready GPU designs across multiple IP generations.
Contribute to the microarchitecture definition and RTL implementation of power management GPU blocks and subsystems, translating architectural specifications into efficient, maintainable, and scalable hardware designs.
Drive design from microarchitecture through RTL development, integration, debug, and simulation readiness while ensuring consistent execution across multiple functional areas and projects.
Drive design quality and accuracy, developing clean, synthesizable RTL, and collaborating with verification teams to enable thorough validation, resolve functional issues, and ensure coverage, robustness, and sustainability.
Resolve functional design challenges, working with architecture, physical design, and system-level teams including SoC team to address interface definition, timing, power, performance, and area tradeoffs early in the design cycle.
Take initiatives on moderate-to-complex projects and help advance best practices, methodologies by exploring emerging GPU technologies and RTL design methodologies.