Staff Engineer, Analog Design

GlobalFoundries • Richardson, TX

2d • $88,000 - $154,000

About The Position

We are seeking a motivated Analog Design Engineer with 2–3 years of experience to contribute to the design and development of high-performance analog and mixed-signal IP. The ideal candidate will take ownership of block-level design while working closely with senior engineers on architecture and system-level integration. This role provides the opportunity to build upon strong fundamentals and expand into full design ownership, including silicon validation and cross-functional collaboration across global teams.

Requirements

• Bachelor’s or master’s degree in electrical engineering or related field
• 2–3 years of experience in analog or mixed-signal IC design
• Solid understanding of analog design fundamentals: Device operation, biasing, gain, bandwidth, Stability and compensation, Noise, mismatch, and process variation
• Experience with transistor-level design and simulation in CMOS technologies
• Familiarity with industry-standard EDA tools (Cadence Virtuoso, Spectre, etc.)
• Ability to run and analyze simulations across PVT and variability conditions
• Strong analytical and debugging skills
• Basic scripting skills (Python, MATLAB, or similar) are a plus
• Good communication and documentation skills
• Ability to work effectively in cross-functional, global teams

Nice To Haves

• Experience designing one or more analog blocks from spec to simulation (partial or full ownership)
• Exposure to silicon validation and lab debugging
• Familiarity with layout concepts and parasitic effects
• Experience with low-power design techniques
• Exposure to advanced nodes such as Bulk CMOS, FDSOI, or FinFET
• Experience contributing to tape out or silicon-proven designs

Responsibilities

• Design and develop key analog and mixed-signal IP blocks such as: Amplifiers (op-amps, instrumentation amps), Comparators, Data converters (SAR, delta-sigma, pipeline familiarity), Bandgap references and regulators (LDO, DC-DC basics), Monitoring circuits (POR, power-good, etc.)
• Contribute to architecture discussions and design tradeoff analysis with senior team members
• Perform transistor-level schematic design, simulation, and verification using industry-standard EDA tools
• Analyze circuit performance across PVT conditions including: Corner simulations, Monte Carlo mismatch analysis, Noise and reliability considerations
• Work closely with layout engineers to ensure parasitic-aware design and performance closure
• Support and contribute to design reviews and verification planning
• Participate in silicon bring-up, validation, and debugging activities
• Collaborate across disciplines including layout, verification, and SoC integration teams
• Generate clear documentation for design specifications, simulations, and validation results
• Perform all activities in a safe and responsible manner and support Environmental, Health, Safety & Security requirements and programs
• Mentorship of junior design/layout engineers in design best practices and effective collaboration

Benefits

• The exact Salary will be determined based on qualifications, experience and location.
• Requests for accommodation will be considered on a case-by-case basis.
• An offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior