Staff DSP Algorithm Systems Design Engineer

GreenWave Radios™•San Jose, CA
•$180,000 - $200,000

About The Position

InnoPhase Inc., doing business as GreenWave Radios™, develops power-efficient digital-to-RF solutions for Open RAN cellular infrastructure. The Staff DSP Algorithm Systems Design Engineer will own end-to-end system architecture for the company's 5G NR and O-RAN product lines, translating RF and protocol requirements into silicon-level specifications. The position spans RF, baseband, and massive MIMO, from architecture through laboratory validation. The engineer will define cellular SoC architecture and O-RAN subsystem specifications, develop and maintain system specifications, and use simulations to evaluate architectural choices before tape-out. The role also leads prototype-hardware bring-up and characterization, defines system test plans and acceptance criteria, and coordinates cross-functional resolution of issues with RF, analog, digital, firmware, protocol, and test teams. The engineer will contribute to compliance verification, technical documentation, design reviews, and mentoring junior systems engineers.

Requirements

  • At least 8 years of hands-on experience in wireless systems development, including LTE or 5G NR.
  • PhD in Electrical Engineering.
  • Proficiency in signal-processing analysis and modeling using MATLAB, Python, or C/C++.
  • Strong understanding of communication theory and signal-processing algorithm design, including timing recovery, signal estimation and detection, MIMO estimation and detection, automatic gain control, channel estimation, equalization, coding theory, and beamforming.
  • Familiarity with 5G NR system architecture, including PHY layer, numerology, beamforming, and massive MIMO antenna-system design.
  • Experience with O-RAN architecture, including functional split options, O-RU/O-DU/O-CU definitions, eCPRI/CPRI fronthaul specifications, and O-RAN Alliance WG4/WG7 compliance.
  • Proven laboratory experience operating RF test equipment and interpreting its data in a prototype bring-up environment.
  • Hands-on experience with Cadence tools such as Virtuoso, Spectre, or AWR Microwave Office for schematic capture, simulation, or system-level modeling.
  • Experience authoring system-level specifications and architecture documents that drive IC design decisions.
  • Strong fundamentals in RF system analysis, including noise figure, linearity (IIP3 and P1dB), dynamic range, phase noise, spurious performance, and link-budget methodology.
  • Familiarity with 3GPP 5G NR standards testing and compliance methodology, including TR 38.803 and TS 38.104.

Nice To Haves

  • Experience using MATLAB or Python for system-level simulation, massive MIMO beamforming modeling, or automated test scripting.
  • Exposure to mixed-signal or RFIC design in advanced CMOS nodes such as 28nm, 22nm, or 16nm FD-SOI or FinFET.
  • Familiarity with O-RAN open-source platforms or test tools such as OSC, OpenAirInterface, or ORAN-SC for integration and conformance testing.
  • Familiarity with AI-assisted test-data analysis and ML-based signal or power-integrity prediction tools.
  • Experience using Claude Code or similar AI coding assistants for design scripting, simulation automation, or documentation, and familiarity with agentic AI tools for engineering workflows.
  • Experience applying AI to technical documentation workflows, such as LLM-assisted datasheet parsing, specification drafting, or design-review summarization.
  • Comfort adopting AI-augmented workflows to improve design productivity.

Responsibilities

  • Define and own cellular SoC system architecture, including link budgets, system partitioning, massive MIMO beamforming chains, and performance trade-off analysis.
  • Architect and specify O-RAN-compliant subsystems, including split options, fronthaul interface requirements, and RU/DU functional partitioning in coordination with protocol and firmware teams.
  • Develop and maintain detailed system specifications for RF front-end, baseband, clocking, power, and RF/digital interfaces as authoritative references for IC design teams.
  • Build and run system simulations covering RF link, massive MIMO beamforming gain, interference, EVM, sensitivity, and dynamic range to validate architecture decisions before tape-out.
  • Lead prototype-hardware lab bring-up and characterization using RF and protocol test equipment.
  • Define system-level test plans and acceptance criteria, and work with test engineers to implement automated laboratory measurement flows.
  • Partner with RF, analog, digital, and firmware teams to resolve issues identified in simulation or the lab, from root cause through silicon fix.
  • Drive system-level compliance verification against 3GPP 5G NR and O-RAN Alliance specifications, and represent the company in standards and alliance working groups where applicable.
  • Produce architecture documents, design review materials, and technical trade-off memos for product and executive decisions.
  • Assist in mentoring junior systems engineers and establish best practices for system modeling, specification, and laboratory methodology.

Benefits

  • Competitive base salary.
  • Pre-IPO stock options.
  • Comprehensive benefits package.
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