Staff Design Engineer

Qorvo • San Jose, CA

3d • $144,300 - $187,600

About The Position

As a Staff RFIC Design Engineer, you will play an important role in designing and developing Silicon RFICs integrated into RF Front-End Modules (FEMs) for next-generation 5G NR and 6G smartphones. You will be involved in the entire development process, from defining the initial RFIC architecture to facilitating high-volume manufacturing, while collaborating closely with system and module integration teams.

Requirements

• A minimum of a Master’s degree in Electrical Engineering (MSEE) with at least 8 years of industry experience, or a Ph.D. degree.
• Over 8 years of experience in RFIC circuit design using various silicon technologies, including SOI, SiGe, and bulk CMOS.
• Extensive experience with design tools such as Cadence, ADS, and HFSS.
• In-depth knowledge of transistors, with the ability to design supporting analog circuitry such as current references, bandgaps, charge pumps, LDOs, DACs, and level shifters.
• Proficient in refining simulation results to achieve high predictability for first-pass success.
• Strong background in RF measurements and characterization.
• Ability to work independently in a fast-paced environment.
• Good communication and presentation skills.

Responsibilities

• Design and develop Silicon RFIC circuits, including low-noise amplifiers (LNAs), switches, couplers, and detectors specifically for the mobile communications market, with a focus on RF front-end modules for 5G NR and 6G applications.
• Support the integration of Silicon RFICs into multi-chip modules (MCMs).
• Utilize RF measurement equipment and troubleshoot measurement issues as needed.
• Document and present results to both internal and external customers.

Benefits

• Competitive base salary commensurate with experience: $144,300.00 - $187,600.00, relevant for the California Bay Area (subject to change dependent on physical location)

What This Job Offers

• Job Type: Full-time
• Career Level: Senior