Quadric is building a General-Purpose Neural Processing Unit (GPNPU) for high-performance AI, DSP, and machine-learning compute on edge devices. The Staff Deep Learning Compiler Engineer will design and optimize the compiler stack—including MLIR, Apache TVM, and LLVM—to connect neural-network frameworks with Quadric’s proprietary hardware. The role focuses on delivering high performance, low latency, and memory efficiency for edge AI workloads. The engineer will develop compiler infrastructure and optimization passes, build lowering pathways from frameworks such as PyTorch, TensorFlow, and ONNX to low-level kernels, and optimize model performance across memory throughput, latency, compute utilization, and power consumption. The role also involves graph transformations and support for evolving model architectures, as well as profiling and benchmarking end-to-end workloads. Working closely with hardware and micro-architecture teams, the engineer will contribute to instruction-set and accelerator-feature definition, validate compiler correctness and generated-binary performance with simulators and test benches, and participate in FPGA and ASIC bring-up and validation. Success includes integrating support for key deep-learning models, delivering measurable optimization improvements, and using workload analysis to inform future micro-architecture decisions.
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Job Type
Full-time
Career Level
Senior