Sr. Staff Test Engineering Manager

Marvell TechnologySanta Clara, CA
$149,340 - $223,700

About The Position

Marvell is seeking a highly motivated and talented Sr. Staff Test Engineering Manager to join our dynamic NPI test engineering team. You are a key technical and people leader responsible for driving end-to-end test engineering strategy, execution, and delivery for complex cutting-edge technologies, including AI Compute, Server, and Network Processors. At Marvell, you'll find a fun and exciting work environment with significant growth potential. You will lead and collaborate closely with Product, Hardware, Design/DFT, and Firmware engineering teams to enable first-pass silicon success, accelerate time-to-market, and ensure high-quality, cost-effective product test solutions.

Requirements

  • Bachelor’s degree in Electrical Engineering or related fields and 10-15 years of related professional experience and/or Master’s degree in Electrical Engineering or related fields with 7-12 years of experience in semiconductor test engineering, with demonstrated leadership experience.
  • Strong expertise in Advantest 93K and/or Teradyne UltraFLEX ATE tester platform(s).
  • Leadership experience in ATE testing (critical skill), test methodology, silicon process, DFT/DFM, and high-speed digital testing experience.
  • Proven track record of leading NPI programs to successful production releases.
  • Strong leadership, communication, and cross-functional collaboration skills.
  • Strong strategic thinking combined with hands-on execution mindset and problem-solving skills.
  • Highly motivated people leader with the ability to multi-task in a fast-paced environment.
  • Good knowledge of C/C++, Perl, Python, Java, and Linux environment.

Responsibilities

  • Define and drive test engineering strategy across wafer sort, characterization, and production for advanced cutting-edge multi-site SOCs.
  • Spearhead the development of ATE test solutions on Advantest 93K and/or Teradyne tester platforms.
  • Establish best-known methods (BKMs) for post-silicon test development, enabling first-time right execution.
  • Drive test architecture decisions, including DFT/testability requirements with strong collaboration with Design and DFT teams.
  • Drive resource planning to build, lead, and develop a high-performing test engineering team and allocation across multiple programs to meet business objectives.
  • Partner with Design, DFT, PE, HW, and System Validation teams to lead resolution of critical technical issues and drive test program optimization, test times reduction, yield improvement, and program releases in collaboration with Product Engineers as well as Manufacturing teams.
  • Represent test engineering in program reviews, executive updates, and customer discussions.
  • Lead initiatives to improve time-to-market, drive adoption of new tools, methodologies, and platforms as well as promote standardization across programs to improve efficiency and scalability.

Benefits

  • employee stock purchase plan with a 2-year look back
  • family support programs
  • robust mental health resources
  • recognition and service awards
© 2026 Teal Labs, Inc
Privacy PolicyTerms of Service