Sr. Photonics Design Engineer - Santa Clara, CA

Xanadu•,

2h•$150,000 - $200,000

About The Position

Xanadu is seeking a Senior Photonics Design Engineer to drive the design and scaling of state-of-the-art passive and active components for future fault-tolerant quantum hardware. Using Xanadu’s custom high-throughput cloud simulation pipelines, the engineer will develop and execute component design strategies targeting sub-milli-dB loss. The role works closely with Fabrication, Tooling, and Test teams to manage performance trade-offs, execute design-of-experiments (DOEs), and use data-driven analysis to close the design loop from initial concept through high-volume wafer production. The position is based in Santa Clara, California. Base salary is determined by location, experience, and internal benchmarks; the listed range is $150,000–$200,000 USD. The role is also eligible for equity and benefits.

Requirements

MSc or PhD in Engineering, Science, or a related field, with at least 2 years of experience in an industrial setting.
Expert-level knowledge and experience designing passive integrated optical components, including incorporation of wafer variation.
Detailed understanding of sources of loss in photonic devices and their relationship to fabrication processes.
Understanding of trade-offs among simulation approaches, including sources of error and computational resource use.
Deep experience with scripted photonic mask design and layout.
Participation in at least five tapeouts covering design, layout, and analysis.
Experience working in a collaborative, team-based development environment and using version control systems such as Git.
Ability to work in a fast-paced environment and manage multiple competing priorities.

Nice To Haves

Expert-level knowledge and experience designing active integrated optical components, such as Pockels-effect-based phase shifters or III-V photodiodes.
Deep theoretical understanding of coupled-mode interactions in waveguides, resonators, and nonlinear optics.
Experience developing components and performing tapeouts with photonic foundries, and turning designs into version-controlled building blocks.
Understanding of Design of Experiments and Design Centering applied to wafer-level optimization of photonic components.
Experience performing statistical analysis on wafer-level data using tools such as JMP.
Experience developing automated optimization approaches, such as particle swarm, Bayesian, and adjoint methods.
Experience incorporating fabrication-process effects such as lithographic rounding, OPC/bias correction, and material nonuniformity into component optimization.
Experience developing design rule checks (DRC) and layout-versus-schematics (LVS) scripts.
Experience developing custom filler patterns and mask data preparation.
Experience performing electro-optic co-design of active devices such as phase shifters and photodiodes with TIAs and electrical drivers.

Responsibilities

Drive the design and scaling of passive and active photonic components for future fault-tolerant quantum hardware.
Develop and execute component design strategies using high-throughput cloud simulation pipelines to target sub-milli-dB loss.
Collaborate with Fabrication, Tooling, and Test teams to manage complex performance trade-offs.
Execute design-of-experiments (DOEs) and apply data-driven analysis to close the design loop from concept through high-volume wafer production.