Sr. Manager Sys/Test Validation Eng.

Advanced Micro Devices, Inc•Austin, TX

About The Position

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. AMD is seeking a Sr. Manager AI Systems Validation Architect to provide company‑level technical leadership in defining how AMD validates AI platforms as complete, deployable solutions. This highly technical and people management role is responsible for validation architecture across server‑, rack‑, and cluster‑scale AI systems. The role shapes validation strategy at the architectural level, ensuring alignment across CPU, GPU, networking, system architecture, and software domains. In addition to broad technical leadership, this candidate will lead and manage a small team of senior architects, amplifying impact through direct architectural ownership, technical direction, and mentorship. This position is expected to be hands‑on when needed, influence multiple organizations, guide long‑term technical direction, and serve as a recognized authority in system‑level validation architecture for AMD’s AI platforms.

Requirements

The successful candidate is a recognized technical leader with deep experience in system‑level validation, debug, and architectural leadership.
You are equally comfortable guiding a small team of senior architects and diving hands‑on into the most complex system‑level problems when needed and enjoy being able to write scripts/SW to help root-cause issues, complement test content or unblock execution of a validation plan.
You bring strong technical judgment, a systems mindset, and the ability to scale impact through both architectural authority and people leadership.
Bachelor’s degree in electrical engineering, Computer Engineering, Computer Science, or related field required

Nice To Haves

Extensive experience in server or data center platform architecture and/or validation.
Strong understanding of AI system architectures, including CPU, GPU, networking, and software stacks.
Proven ability to lead small teams of senior technical contributors while maintaining personal architectural impact.
Several years of experience with scripting, automation, and/or test‑content development.
Demonstrated success defining system‑level validation strategies across multiple domains.
Proven ability to influence technical direction across organizations without relying solely on direct authority.
Strong written and verbal communication skills, including executive‑level technical communication.
Advanced degree or equivalent industry experience preferred

Responsibilities

Architect validation strategies for Server‑level AI platforms (CPU, GPU, memory, IO, firmware, and system software)
Architect validation strategies for Rack‑level systems (power delivery, thermals, fabric, and multi‑node interactions)
Architect validation strategies for Cluster‑level deployments (scale‑out behavior, networking, orchestration, and resilience)
Lead and manage a small team of senior architects, providing technical direction, prioritization, and growth opportunities.
Lead AI-driven initiatives to build plans, proof-of-concepts, test content, etc.
Collaborate with cross-domain engineers and architects to develop validation plans, and help the teams to write and review test content (SW) when needed.
Partner with AMD domain experts across CPU and GPU architecture and validation, Networking and fabric, Memory, IO, and storage subsystems, Platform firmware and system software, Software and automation
Lead and guide complex, cross‑domain debug efforts spanning silicon, firmware, system software, and hardware platforms.
Serve as a technical mentor and reference point for other architects and validation leaders.
Represent validation architecture in cross‑functional technical forums and executive‑level discussions.
Contribute to the evolution of AMD’s validation methodologies, frameworks, and best practices.