Sr Hardware Design Engineer

Qualcomm•San Diego, CA

1d•$117,800 - $176,600

About The Position

As a Senior Hardware Design Engineer, you will join an inventive team responsible for developing next-generation 6G prototype platforms and high-performance hardware modules. This role sits at the intersection of circuit design and physical validation, taking high-speed digital designs from initial schematic architecture through physical PCB layout oversight and lab testing. You will collaborate closely with global, cross-functional teams (including PCB CAD, Signal Integrity, Firmware, Mechanical, and Thermal) to deliver high-quality hardware solutions.

Requirements

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Nice To Haves

3-4 years of professional hardware engineering or related product-development work experience.
Fundamental knowledge of high-speed digital board design principles, including impedance control, crosstalk, and power delivery.
Ability to design high-speed, high power multi-layer PCBs.
Experience utilizing schematic capture tools and basic simulation software (e.g., Hyperlynx, LTspice).
Hands-on familiarity with professional PCB layout software suites, such as Siemens/Mentor Xpedition or Cadence Allegro.
Experience with high-speed interfaces such as Ethernet, PCIe, DDR, USB, or I2C/SPI protocols.

Responsibilities

Drive schematic capture, select hardware components, and manage complex bills of materials (BOMs) for multi-layer digital designs.
Oversee and actively participate in the physical PCB layout process, ensuring strict compliance with high-speed digital routing rules and constraints.
Perform physical board bring-up, debugging, and functional characterization of prototype hardware in the lab.
Utilize lab test equipment (e.g., high-bandwidth digital oscilloscopes, logic analyzers, and multimeters) to isolate and troubleshoot hardware issues.
Collaborate with internal Signal Integrity and Power Integrity teams to optimize layout topologies for high-speed buses.
Document detailed test plans, validation reports, and hardware engineering change orders (ECOs).