Sr. Engineer, SoC Design Verification, PCIe
Tenstorrent•Boston, MA
•$100,000 - $500,000•Hybrid
About The Position
Tenstorrent is seeking a Senior SoC Design Verification Engineer who will focus on pre-silicon verification of PCIe logic in advanced AI SoCs, driving coverage of connectivity, compliance, interoperability, and bring-up features critical to silicon success. This role is hybrid, based out of Boston, MA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.
Requirements
- Deeply curious about PCIe architecture, link behavior, and subsystem verification.
- Expert in UVM and verification of PCIe controller, PHY-facing logic, LTSSM, and protocol flows.
- Comfortable working with PCIe Gen4/Gen5 features, compliance concepts, and advanced verification automation.
- Proactive, detail-oriented, and thrives in cross-functional technical discussions.
Nice To Haves
- Ideally familiar with tools similar to CocoTB.
Responsibilities
- Develop and own verification environments for PCIe logic across AI chiplets and SoCs.
- Write, refine, and execute test scenarios for link training, enumeration, power management, error handling, and data movement features.
- Analyze coverage gaps, debug failures, and collaborate closely with architecture, RTL, and system teams.
- Automate flows for PCIe protocol testing, interoperability validation, and integrate AI productivity tools.
Benefits
- highly competitive compensation package and benefits
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What This Job Offers
Job Type
Full-time
Career Level
Senior
Education Level
No Education Listed
