Sr Digital Physical Design Engineer

Keysight Technologies, Inc.•Colorado Springs, CO

8d•Onsite

About The Position

Keysight is a technology innovation leader, providing breakthroughs and trusted insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. With approximately 16,800 employees, Keysight delivers world-class solutions across communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets to customers in over 100 countries. The company fosters an award-winning culture with a bold vision for technology and a passion for solving challenging problems with industry-first solutions, believing that a sense of belonging fosters creativity, innovation, and career growth. A critical success factor for Keysight is the development and deployment of breakthrough Digital/DSP and mixed-signal ASICs that enhance the performance and value of new products. This role is an exciting opportunity for an experienced Physical Design R&D engineer to be responsible for the physical design and tape release of digital and mixed-signal ASICs. The team is located in Colorado Springs, Colorado, and collaborates in a team environment to develop digital/DSP and mixed-signal ASICs that meet customer functionality, schedule, and quality requirements. This position is part of Keysight Laboratories, a renowned technology organization that enables Keysight to be first to market with breakthrough products and solutions.

Requirements

Bachelors or master’s degree in electrical or computer engineering.
Typically, 20 years relevant experience.
Requires extensive experience and knowledge and ability to work independently.
Industry tapeout experience
Desire to identify and debug problems.
Experience with Innovus, Tempus, Voltus and Genus
Experience with task automation and scripting
Strong EE fundamentals with experience in ASIC Design, DSP, digital architectures/systems, and verification of large and mixed signal ASIC designs
Leadership skills to gain credibility and respect to drive change and influence teams and partners towards higher levels of execution, return, and productivity
Strong teamwork and written/verbal communication skills

Nice To Haves

Experience in digital and analog ASIC design flow, methodologies, and process
Experience with DFT architecture and implementation
Fluent with object-oriented programming
Ability to multi-task and to engage with multiple projects, engineers, and partnerships

Responsibilities

Experienced Digital Physical Design ASIC R&D engineer responsible for both module level as well as SoC Level implementation from RTL to GDS of digital and mixed signal ASICs.
Solves complex and high impact design and development problems including customer application issues of varying scope and complexity.
Uses product and customer applications knowledge to determine, define, develop, and validate design concepts and methods.
Participate in the entire spectrum of full ASIC design activities including definition, architectures, digital logic design, IP validation and synthesis.
Responsible for floor planning, PNR, timing closure, STA, formal verification, low power design, clock distribution, EMIR analysis and physical verification.
Close sign-off checks, interface with industry foundries and GDS delivery.
Work extensively with cross functional teams to guide architecture with physical design constraints.
Develop tool flows and drive vendors to achieve milestones.