Sr DFT Engineer (100% Remote)

Encore Semi•San Jose, CA

4d•Remote

About The Position

Encore Semi, Inc. is seeking a Senior DFT Engineer to lead test architecture and implementation for complex SoCs. The role works closely with design and verification teams to drive DFT requirements from RTL through silicon bring-up and ensure high-quality test coverage. It is listed as full-time and 100% remote, anywhere in the USA. Applicants must be U.S. citizens or Green Card holders. The anticipated annual base salary is $135,000–$150,000, with benefits and bonuses.

Requirements

At least 8 years of industry experience in ASIC DFT engineering.
Strong hands-on expertise with IEEE 1687 (IJTAG) architecture, including ICL and PDL formats.
Deep proficiency with the Mentor Graphics (Siemens) Tessent tool suite.
Simulation, verification, and debug skills using Xcelium, VCS, or QuestaSim.
Fluency in Verilog/SystemVerilog and scripting abilities in Tcl, Python, or Perl.
BS or MS in Electrical Engineering, Computer Engineering, or a related field.
U.S. citizenship or Green Card holder status required.

Responsibilities

Architect, implement, and verify DFT structures, including Scan, MBIST, and Boundary Scan, for next-generation ASIC/SoC designs.
Develop and integrate IJTAG networks across IP and SoC levels.
Perform test insertion, ATPG generation, and fault coverage analysis.
Run and debug zero-delay and timing-annotated gate-level simulations.

Benefits

15 days of PTO per calendar year
10 paid holidays per calendar year
Comprehensive medical benefits; company covers 80% of premiums for employees and dependents
Dental and vision benefits; company covers 50% of premiums for employees and dependents
Voluntary life insurance, FSA (health and dependent care, limited purpose), HAS, and gap insurance
Employee Assistance Program (EAP)
Traditional and Roth 401(k)
Life/AD&D and long-term disability
Tuition reimbursement
Bonuses