Sr. ASIC EDA Workflow Engineer

Tensordyne•Sunnyvale, CA

9d•Hybrid

About The Position

In this hands-on, technology leadership role, you will lead EDA tool flow management, and associated engineering workflow development for Tensordyne's multimodal generative AI inference acceleration products. As a valued senior member of our ASIC team, you will guide and assist your colleagues to help improve and invent EDA workflows within a fast-paced, agile HPC development environment that utilizes EDA tools from external companies like Cadence and as well as internally developed workflows. You will drive Tensordyne’s optimization, implementation and exploration of new EDA tools and technologies for the full ASIC chip design process. Your contributions will continuously innovate and improve scalable, reliable, high-performance systems and tools to enable the next generation of Tensordyne products. This is a hands-on role that’s ideal for ASIC EDA experts who have a multi-disciplinary engineering/DevOps background, along with a keen interest in generative AI, and a passion for designing, debugging, optimizing and finding creative EDA solutions to complex technical challenges. In this role, you will work very closely with your ASIC team members who are engaged in the design and verification of Tensordyne products, to understand and improve their workflows and EDA needs.

Requirements

Experience leading the development and support for compilation, build automation, testing, packaging and installation project generators that build object files like either CMake, GNU make, and/or Ninja
Experience with CI/CD and modern Git Branching workflows
Hands-on ASIC engineering experience, including knowledge of VLSI/SoC chip design and verification workflows
Knowledge of ASIC EDA tool suites from Synopsys and/or Cadence
Knowledge of Linux system administration
Familiarity with cloud-based devops
Experience in supporting EDA tools
Programming and debugging skills with key languages to automate tasks and improve efficiency using scripts
Excellent analytical, written, and verbal interpersonal skills
Ability to productively collaborate within a global engineering team that moves at a startup pace
Bachelor’s or Master's degree in Computer Science, Computer Engineering, Electrical Engineering or a related technical field.

Nice To Haves

Multi-disciplinary engineering/DevOps background
Keen interest in generative AI
Passion for designing, debugging, optimizing and finding creative EDA solutions to complex technical challenges

Responsibilities

Lead EDA tool flow management
Develop associated engineering workflows
Guide and assist colleagues to improve and invent EDA workflows
Drive optimization, implementation, and exploration of new EDA tools and technologies for the full ASIC chip design process
Innovate and improve scalable, reliable, high-performance systems and tools
Work closely with ASIC team members to understand and improve their workflows and EDA needs
Support ASIC engineers with EDA workflows, including installation of new tool versions, FlexLM license management, and debugging/fixing issues with EDA vendors.