SR ASIC Design Engineer - NoC & AXI Interconnect

Advanced Micro Devices, IncSanta Clara, CA
Onsite

About The Position

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. You will contribute to the ASIC (chip) design for high-performance network chips: AINIC and DPU. As a member of the NTSG ASIC Design Team, you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success.

Requirements

  • A successful candidate will work with senior silicon design engineers.
  • The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills.
  • Bachelors or Masters degree in computer engineering/Electrical Engineering

Nice To Haves

  • Understanding of Network-on-Chip (NoC) architecture, protocols, and design
  • Experience with AXI, ACE, and APB interface design and verification
  • Knowledge of queuing system design and buffer management
  • Experience with VCS simulation tool, Perl/Python/Shell scripting, and SystemVerilog/Verilog RTL design

Responsibilities

  • Network-on-Chip (NoC) design and integration
  • AXI, ACE, and APB interface design and verification
  • Queuing system design and implementation
  • Collaboration with architecture, IP, and physical design teams for first-pass silicon success
  • Post-silicon bring-up support and yield learning

Benefits

  • AMD benefits at a glance.
© 2026 Teal Labs, Inc
Privacy PolicyTerms of Service