Sr AI Runtime Architect - Neuromorphic Computing

Intel Corporation•Santa Clara, CA

2d•$195,200 - $315,490•Hybrid

About The Position

For nearly a decade, Intel's Neuromorphic Computing Lab, together with a global ecosystem of 250+ research groups, has explored architectures, algorithms, and software inspired by the brain's extraordinary efficiency, scalability, and adaptability. Our Loihi series of research chips pioneered event-driven, sparse, and massively parallel neuro-inspired processing, fueling over 100 peer-reviewed publications that validate the promise of this novel approach. Now, we're entering an exciting new chapter: transforming these breakthroughs into real-world products that will power the coming era of physical AI systems - beyond the reach of GPUs and mainstream AI accelerators. If you are passionate about pushing the boundaries of computing, from transistor-level innovation to software abstractions, join us. Help define the next wave of AI technology that harnesses the proven advantages of Intel's neuromorphic computing technology with the versatility demanded by modern AI workloads. Join the team building Intel's neuromorphic AI execution stack targeting edge and robotic systems. In this role, you will lead the team and technical direction for our next-generation runtime stack, while remaining hands-on in architecture and implementation. You will set the roadmap from the first product generation onward, on a spatial, event-driven architecture that redraws the boundary between compiler and runtime.

Requirements

BSc, MSc, or PhD in Computer Science, Computer Engineering, Electrical Engineering, or a related technical field.
5+ years of experience developing and shipping AI runtime software, such as OpenVINO, TensorRT, ONNX Runtime, Ryzen AI, or comparable runtimes, for accelerators, GPUs, or other complex hardware, with working knowledge of the underlying drivers and firmware.
5+ years of experience leading the architecture of complex software systems, including defining technical direction and the interfaces to adjacent components.
5+ years of experience owning the performance and production quality of accelerator software, including profiling, benchmarking, and debugging across hardware and software boundaries.
5+ years of experience providing technical leadership to engineering teams, including mentoring engineers and leading cross-functional delivery.
10+ years of hands-on experience developing production-grade systems software in C/C++, with proficiency in Python, using disciplined engineering practices such as code reviews, automated testing, and CI/CD.
1+ years of hands-on experience with agentic software engineering, routinely using AI agents to design, implement, test, and review production code.

Nice To Haves

Experience managing engineering teams, including hiring and developing engineers.
Experience with the internals of OpenVINO, oneAPI Level Zero, or comparable accelerator software stacks.
Experience with spatial, dataflow, or statically scheduled accelerators where the compiler determines placement and scheduling.
Experience with robotics or real-time systems, including deterministic execution and ecosystems such as ROS 2 or Holoscan.
Experience developing or integrating functional or performance simulators into accelerator software stacks.
Familiarity with device driver and firmware development for embedded Linux or RTOS-based systems.
Experience with HW/SW co-design or performance modeling.

Responsibilities

Define and drive the technical vision, architecture, and roadmap for the runtime stack, from firmware to framework integration, while contributing hands-on to critical design and implementation.
Architect and develop the runtime and performance tooling, and define the execution behavior that the firmware and drivers must implement, whether the device is attached to a host or runs standalone.
Own the contracts between the runtime stack and the compiler, as well as its integration with industry-standard AI and robotics frameworks.
Own the measurable performance, real-time behavior, and production quality of the stack across silicon and simulators.
Collaborate with compiler, hardware, and application teams, as well as customers and partners, to translate workload requirements into runtime capabilities and feed performance insights back into compiler and hardware design.
Provide technical leadership by establishing engineering practices and mentoring engineers.