SPICE Modeling Engineer (SB-64000981)

Cirrus LogicAustin, TX
30dHybrid

About The Position

For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands. Cirrus Logic is also known for its award-winning culture, which was built on a foundation of inclusion and fairness, meaningful community engagement, and delivering enjoyable employee experiences at every turn. But we couldn’t do it without our extraordinary workforce – and that’s where you come in. Join our team and help us continue to make Cirrus Logic an exceptional place to grow your career! We’re seeking an experienced engineer with device characterization, test chip design, SPICE and device reliability modeling background. In this position, you will be responsible for maintaining device lab equipment functions, performing a wide range of device characterization, and extracting SPICE and device aging models for semiconductor devices.

Requirements

  • Ph.D. in Electrical Engineering or Physics or related engineering discipline, or Master’s in Electrical Engineering or Physics or related engineering discipline with 3+ years of experience
  • Fundamental knowledge of semiconductor device physics related to compact modeling of different types of devices
  • Proven experience in deep submicron CMOS and BCD device measurement and characterization with parametric analyzer, LCR meter, etc.
  • Detailed knowledge in using manual, semi-automatic, and automatic probers
  • Familiar with active and passive devices in CMOS and BCD process technologies
  • Understanding of semiconductor device noise and matching behaviors
  • Familiar with physics of semiconductor device aging
  • Experience in test structure layout of individual devices and arrays
  • Experience in SPICE model generation and QA flow
  • Excellent verbal communication skills and technical writing skills

Nice To Haves

  • Ability to stress test devices to understand post-stress behavior and SOA
  • Prior experience with digital and analog design flow and methodology is a plus
  • Experience running simulations using Cadence ADE
  • Knowledge and experience in test structure layouts for various technology nodes, including advanced CMOS and BCD/HV for Analog/Mixed-Signal products
  • Coding skills in Python, Perl or other computing languages

Responsibilities

  • maintaining device lab equipment functions
  • performing a wide range of device characterization
  • extracting SPICE and device aging models for semiconductor devices

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What This Job Offers

Job Type

Full-time

Career Level

Mid Level

Education Level

Ph.D. or professional degree

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