LTD RET Software/Research Engineer

Intel Corporation•Hillsboro, OR

2d•$149,600 - $284,580•Hybrid

About The Position

This position is part of Intel’s Logic Technology Development (LTD) team, within the Resolution Enhancement Technology (RET) team. The team works to extend the feature sizes that can be patterned on Intel devices using current and future lithography manufacturing tools. It collaborates with fab-integrated lithography process and mask manufacturing teams, applying computational lithography to optimize mask patterns and improve manufacturing process capability. The team also works with design rule definition teams, using lithography and patterning simulations to determine design rules for future process nodes. The engineer develops and implements optical proximity correction (OPC) algorithms and other resolution enhancement techniques for existing and novel process technologies. The role uses predictive modeling, statistics, machine learning, and other data analysis methods to examine fab process data and develop software that compensates for physical effects in photolithography imaging and etch pattern transfer. It also supports production mask tapeout and RET validation, and contributes technical documentation and presentations.

Requirements

Bachelor’s degree in a relevant field and 6 or more years of professional experience in the semiconductor industry; or master’s degree in a relevant field and 4 or more years of such experience; or Ph.D. in a relevant field and 2 or more years of such experience.
Hands-on professional experience in one or more of the following: pattern synthesis and mask layout manipulation, or knowledge of OPC concepts and capabilities.
Relevant fields include Computer Science, Software Engineering, and Electrical Engineering.

Nice To Haves

Understanding of the latest techniques for developing and optimizing OPC rule-based synthesis solutions to support both high-volume and newly developing technology nodes.

Responsibilities

Develop and implement Optical Proximity Correction (OPC) algorithms.
Develop and implement Resolution Enhancement Techniques (RET) for existing and novel process technologies.
Define and select new RET approaches and implement them.
Optimize and validate OPC recipe code.
Perform algorithmic design pattern layout manipulation.
Use predictive modeling, statistics, machine learning, and other data analysis techniques to collect, explore, and visualize fab process data and develop RET software algorithms and applications to compensate for physical effects in photolithography imaging and etch pattern transfer.
Support production mask tapeout and RET validation.
Maintain knowledge of state-of-the-art principles and trends in RET and semiconductor technology.
Create technical documentation and presentations.