Software Engineer, Chip Design

Ricursive IntelligencePalo Alto, CA

About The Position

As a Software Engineer at Ricursive, you’ll build the systems and infrastructure that power our chip design flow. You’ll work across the broader design stack, improving how we run, evaluate, and iterate on complex problems at scale. This includes building reliable execution infrastructure, developing tooling that connects different stages of the flow, and improving performance and scalability. You’ll run against real designs with real constraints, debug issues that only emerge at scale, and make engineering tradeoffs around quality, runtime, robustness, and deadlines.

Requirements

  • Bachelor’s degree in Computer Science, Electrical Engineering, or a related technical field.
  • Strong programming skills in Python, C++, Java, or a comparable language.
  • Comfortable using modern AI-assisted development tools to navigate complex codebases, debug problems, and accelerate engineering workflows.
  • Working understanding of the digital chip design flow, including the major stages from RTL through physical design and signoff.
  • Demonstrated ability to take ownership of ambiguous technical problems, ramp quickly in unfamiliar areas, and drive work through to production.

Nice To Haves

  • Master’s or PhD in Computer Science, Electrical Engineering, or a related technical field.
  • Experience with semiconductor design, distributed systems, or optimization.
  • Familiarity with design automation algorithms in one or more areas of the chip design flow, such as placement, timing analysis, RC extraction, netlist processing.
  • Demonstrated and quantified the PPA benefit of using AI/ML tooling

Responsibilities

  • Develop and scale the infrastructure behind our chip design flow, optimizing for scalable systems that can support hierarchical design, advanced process nodes, and increasingly complex design constraints.
  • Analyze design metrics like timing violations, congestion, routing issues, and other design problems, helping the overall flow converge faster toward better PPA.
  • Deploy AI-driven methods to automate design analysis, optimization, and iteration across the flow.
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