SoC Platform Engineer

E-Space•Saratoga, CA

1d•Onsite

About The Position

E-Space is bridging Earth and space to enable hyper-scaled deployments of Internet of Things (IoT) solutions and services. We are building a highly-advanced low Earth orbit (LEO) space system that will fundamentally change the design, economics, manufacturing and service delivery associated with traditional satellite and terrestrial IoT systems. We are seeking a skilled and driven SoC Platform Engineer to take ownership of IP integration, system-level verification, and firmware development for our custom SoC. You will work at the intersection of hardware and software, shaping the platform from IP bring-up through full-chip validation — defining testbenches, authoring test firmware, and implementing critical SoC features in silicon. This is a hands-on role with broad impact across the hardware development cycle.

Requirements

Proficiency in RTL design and verification using SystemVerilog and/or VHDL.
Experience with UVM or similar structured verification methodologies.
Ability to write bare-metal C firmware for hardware bring-up, feature validation, and test automation on embedded targets.
Strong knowledge of AMBA protocols (AXI, AHB, APB) and their application in SoC integration.
Understanding of SoC subsystem partitioning, memory maps, interrupt routing, and hardware/software interfaces.
Experience with simulation tools (e.g., VCS, Questa, Xcelium) and hardware debug environments (JTAG, logic analyzers, oscilloscopes).
Proficiency in scripting languages such as Python, Tcl, Bash, and Makefiles for build flow automation and test infrastructure.
Expertise with Git or similar version control systems.

Nice To Haves

Experience with ARM Corstone reference designs and Cortex-M or Cortex-A processor integration.
Familiarity with TrustedFirmware-M, MCUboot, or PSA-certified security architectures.
Knowledge of embedded security concepts, including cryptographic algorithms and Post-Quantum Cryptography (PQC).
Experience with formal verification or property checking tools.
Familiarity with Cortex-A and Cortex-M class processors, NPU processors, and DSP processors.
Familiarity with FPGA emulation platforms for pre-silicon validation.
Knowledge of 3GPP network protocols as they relate to SoC modem or connectivity subsystem integration.
Experience with low-power SoC design and power intent methodologies (UPF/CPF).
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.

Responsibilities

Evaluate, integrate, and verify IP blocks within the SoC, ensuring correct connectivity, configuration, and interoperability across the platform.
Author targeted test firmware to bring up and verify individual IP blocks and hardware features at the module level.
Develop subsystem-level test firmware to validate interactions between integrated components and confirm correct system behavior across hardware boundaries.
Define, implement, and maintain system-level testbenches covering subsystem and full SoC verification scenarios.
Own and manage testbench build flows, ensuring reproducibility, scalability, and integration with the broader verification environment.
Implement SoC-level security features, including secure boot, hardware root of trust, and cryptographic accelerator integration.
Define and implement communication fabrics and protocols between SoC subsystems, including AMBA-based interconnects (AXI, AHB, APB).
Implement hardware power management features, including power domain control, clock gating, and low-power state transitions.
Define and implement the SoC boot architecture, including reset sequencing, configuration registers, and boot ROM integration.
Work closely with SoC firmware engineers, RTL designers, and physical design teams to ensure cohesive hardware-software integration throughout the development cycle.
Produce and maintain clear technical documentation covering integration specifications, verification plans, test procedures, and feature implementation details.