SoC Architect

d-Matrix•Santa Clara, CA

2d•$175,000 - $265,000•Hybrid

About The Position

At d-Matrix, we are focused on unleashing the potential of generative AI to power the transformation of technology. We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible. Our culture is one of respect and collaboration. We value humility and believe in direct communication. Our team is inclusive, and our differing perspectives allow for better solutions. We are seeking individuals passionate about tackling challenges and are driven by execution. Ready to come find your playground? Together, we can help shape the endless possibilities of AI. The AI Architecture Team is responsible driving Silicon roadmap and directions, architectural explorations, hardware-software co-design, performance projections and modeling, cross-team collaborations and academic outreach. You will be joining a team of exceptional people enthusiastic about researching and developing state-of-the-art efficient deep learning techniques tailored for d-Matrix's AI compute engine. We are seeking SoC Architect to lead our SoC Technologies Definition. This exciting opportunity requires strong technical knowledge and exceptional leadership. You will drive the Architecture in conjunction with RTL & DV engineers of multiple technologies including but not limited to performance and power efficiency, thermal management, memory, interconnects & packaging to deliver exceptional product experiences across our entire portfolio.

Requirements

MS in Computer Science, Electrical and Computer Engineering, or a related scientific discipline with 5+ year of relevant experience in compute architecture and system design area.
A problem solver, self-starter, be able to effectively multi-task and simplify complex problems to come up with elegant and efficient solution (no compromise here!)
5 or more years of demonstrated experience leading Architecture or Design Development of SoCs.
Expert knowledge of AI SoC Architecture, requirements, and definition.
Be able to identify potential architectural issues and design flaws early in the design phase to provide effective solutions and recommendations.
Experience with CPU, GPU, ASIC and ML accelerator architecture exploration and architectural modeling.
High proficiency in performance modeling, ranging from simple analytical model to complex cycle accurate performance model and correlation
Deep, wide and current knowledge in machine learning and modern deep learning is required.
Hands-on experience with CNN, RNN, Transformer neural network architectures.

Nice To Haves

Experience with specialized HW accelerator systems for deep neural network is preferred.
PhD in Computer Science, Electrical and Computer Engineering, or a related scientific discipline with 5+ year of relevant experience in compute architecture and system design area.
High proficiency in algorithm analysis, data structure, and Python programming is required. Proficiency with C/C++ programming is preferred.
Passionate about AI and thriving in a fast-paced and dynamic startup culture.

Responsibilities

Lead the design and delivery of SoC requirements and architecture that delivers exceptional customer experiences.
Analysis of AI workloads such as transformers & CNNs across existing and new emerging product categories to identify bottlenecks and opportunities for improvement.
Identify areas of improvement and drive the architecture to deliver the product. Design, implement and evaluate efficient deep neural network architectures and algorithms for d-Matrix's AI compute engine.
Conduct research to guide hardware/software co-design of SIMD engine, control plane, data reshape engine, data convertor blocks, NoC substrate and many other blocks.
Work on various phases of our flagship product (Corsair I and II) and the Next-Generation product ranging from performance projection, performance modeling, performance correlation and performance debug aspects.
Engage in Kernel Development and assist in the Networking Fabric Enhancements.
Develop and maintain tools for high-level simulation and research to enable architectural exploration of current and future generation products.
Engage and collaborate with SW team to meet stack development milestones.
Port customer workloads, optimize them for deployment, generate reference implementations and evaluate performance.
Report and present progress timely and effectively.
Contribute to publications of papers and intellectual properties.