Silicon Validation Product Engineer, Google Cloud

Google•Sunnyvale, CA

6d•$138,000 - $197,000

About The Position

As a Silicon Validation Product Engineer on Google Cloud, you will help develop and validate TPU technology for AI/ML hardware acceleration. You will contribute silicon design and verification expertise, with a focus on TPU architecture and integration into AI/ML systems. You will support integration and testing on hardware emulation platforms. During post-silicon, you will lead validation, bring-up, and system qualification across power features, interfaces, HBM memory, compute functionality, and overall performance. You will also provide engineering support during chip manufacturing, deployment, and field operations, monitoring quality and reliability while optimizing test efficiency, root-cause analysis, and process workflows. The AI and Infrastructure team delivers AI and infrastructure capabilities at scale for Google customers, Googlers, and Google users. Its work spans software and hardware, including TPUs, Vertex AI for Google Cloud, global networking, data center operations, and systems research.

Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
4 years of experience with silicon or semiconductors, such as digital design, silicon validation, computer architecture, or product engineering.
Experience scripting in one or more programming languages, such as Python.

Nice To Haves

Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture.
Product engineering experience managing and optimizing test content, debugging issues, performing RMA/FA, and conducting root-cause analysis.
Experience collaborating with silicon vendors, contract manufacturers, and supply chain partners to improve test quality, reliability, and yield.
Experience with large digital SoCs, focusing on functional domain engineering and using complex software stacks for functional testing, investigations, and log/data analysis.
Experience with high-speed interfaces, ASIC interfaces, memory systems (HBM), power system features, or high-power ASICs.

Responsibilities

Own sustaining phases of the silicon development lifecycle; monitor, debug, and deploy corrective actions for quality and reliability issues in manufacturing, deployment, and serving.
Optimize test performance across manufacturing and deployment, partnering with cross-functional teams to improve test coverage and reduce overall test time.
Drive triage, debugging, and corrective actions across deployment stages; support rapid resolution during early NPI to reduce test failures and escapes and drive process improvements as needed.
Collaborate with supply chain, contract manufacturing, and vendors to implement firmware, software, hardware, or process improvements.
Investigate, reproduce, and root-cause field failures, focusing primarily on functional operations alongside DFT/DFD structural testing.
Support integration and testing on hardware emulation platforms.
Lead post-silicon validation, bring-up, and system qualification across power features, interfaces, HBM memory, compute functionality, and overall performance.
Provide ongoing engineering support during chip manufacturing, deployment, and field operations, including monitoring quality and reliability and optimizing test efficiency, RMA/FA root-cause analysis, and process workflows.